CS 460: Embedded Systems
Fall 2006


Course Description

In today's world there are at least two orders of magnitude more embedded systems than PCs. Embedded systems are employed in consumer electronics such as cameras, DVD players and cable descramblers, in cars, airplanes, factories, offices and hospitals. Their large numbers and growing complexity call for a new approach to their design. In this new, experimental, course we will learn to program the processors embedded in electronic devices such as cell phones, digital clocks and cameras, and gameboys. In the lab FPGA based boards will be used as target platforms. At the end of this course, students will be able to use electronic design automation tools and will have implemented a set of complete embedded systems on the FPGA boards.

This course is part of the new curriculum in High Level Programming for High Performance Embedded Computing Systems sponsored by NSF and CSU. The FPGA boards in the lab were donated by Xilinx, inc. The other part of this curriculum, Reconfigurable Computing is taught by Prof. Sanjay Rajopadhye.

ANNOUNCEMENTS

Yoo koso! Huan ying! Benvenuto! Bienvenue! Wilkommen! Welcome!
Changing the ModelSim License Server
Class Lecture Schedule
Mock Midterm II has been posted.
Schedule updates: The due date of Lab 6a,b, and the date of Midterm II have both been changed. Please check the schedule page.
Clarification about Lab Hours: The south side general lab and also the ESL is supposed to be open whenever the general (north side) lab is open. Sometimes, the lab ops may forget this, so if you notice any problems please let Sanjay and/or Tomofumi know the date/time of the event so that we can rectify it.
Here is what we want you to show us by Friday after the break.
-Diagram of BCD Clock (does not have to be detailed)
-Display single digit on the board

Have a good break!
Here is the mock midterm
Please note classroom change (to USC 310B from Engr B 101)
Lab Teams: There is a limited number of stations (10) in the lab. So, you must work in teams of two. In the first week of class, each lab team shall e-mail their names, team name, and e-mail addresses to the lab systems manager: hansenp@cs.colostate.edu . The information should be in the following format:

group name
email team member 1, email team member 2
full name member 1, full name member 2

Note: the group name needs to be practical (i.e., a legal unix login). If you do not do this by the start of Week 2, you cannot take part in the ModelSim recitation that week.

Instruction and labs

  • Instructor: Sanjay Rajopadhye USC 223, Sanjay.Rajopadhye@colostate.edu , office hours: please check the most up-to-date information in Sanjay's schedule.
  • Graduate Teaching Assistant: Tomofumi Yuki, yuki@cs.colostate.edu , office hours Tue 11:00-1:00 (South Lab), Th 10:00-12:00 (North Lab)
  • Lectures: TuTh 8:00-9:15 AM
  • USC 310B (changed from Engr B 101).
  • Recitation: In the lab, times TBA
  • Office Hours: TBA
  • Here are some pictures of USC 310C (Embedded Systems Lab).
  • Teams: There is a limited number (10) of stations in the lab. So, you must work in teams of two.
    In the first week of class, each team shall identify itself by e-mail to the lab systems manager: hansenp@cs.colostate.edu .
  • Recitations are intended to familiarize you with the tools. They will be held in the ESL Lab, 310C, USC. The lab will also remain open at other times (lab hours are the same as CS south lab hours).
  • Prerequisite: CS370, ENFORCED
  • Textbook: Essential VHDL, RTL Synthesis done right, Sundar Rajan, ISBN: 0-9669590-0-0
  • Grading: Lab 50% ([lab,weight]: [1,2], [2,8], [3,8], [4,12], [5,6], [6,14]), Midterms 25% each.

    Class Lecture Schedule

    Course Outline

    The last semester's course outline is given below. We intend to follow this outline, and it will be updated as we proceed through the semester.

    1. Introduction
      • Course overview
      • Embedded Systems overview
      • Example Embedded Systems and their Requirements
      • Design Challenges, Metrics
      • Processor technologies
      • IC technology
      • Programmable Logic Devices
      • FPGA Programming Model
      • 3 Abstractions
    2. VHDL Introduction
      • VHDL Entities and architectures
      • Standard Logic Vectors
      • Signals, In, Out, Inout
      • Execution Order, RTL
      • Structural, Dataflow, Behavioral
    3. Hardware background: Combinational Logic
      • Wires, Drivers, Transistors, logic gates
      • Combinational Logic, Multiplexors, Decoders, Encoders
    4. VHDL Cont
      • A First VHDL Design: XOR3
      • ModelSim, Do Files
      • Decoders, Encoders
      • Generics, Int type, Generates
      • LAB1: Ripple Carry Adder
      • Synthesizable, behavioral VHDL constructs
    5. FPGA Structure
      • FPGA architecture
      • Configurable Logic Block Structure (CLB), wiring
      • On chip wiring: Global routing matrix,
        global, long, hex and single lines
      • Memory hierarchy: LUTs, Block RAM, external memory controllers
      • IO blocks
    6. The DIGILENT SPARTAN3 board
    7. FPGA Design Flow
      • Design Entry
      • Synthesis
      • Place and Route
      • Download
    8. Sequential VHDL
    1. EDK Structure
      • A soft processor in VHDL: the LC3 LC3 code
      • The Xilinx EDK
      • Microblaze
      • Block RAMs
      • Busses, OPB/LMB
      • Peripherals, UART, GPIO
    2. EDK Programming
      • Microblaze
      • Software debugging, GDB, MDM
      • UART, GPIO, detecting button presses
      • LAB5: First EDK Design: knock knock
      • Event handlers, timers, FSLs
      • Building an SVGA system in the Spartan
      • Using BlockRAMs in the SVGA system
      • LAB6: The games people play!!
      • You can find some useful examples on the public area on galdalf in the lab. There should be an icon on your desktop called "public_on_gandalf" with a picture of a cute little house. It should also be mapped to your P: drive when you are in the lab. It contains (Among other things):
        • EDK_Peripherals
          Some example EDK Peripherals, such as the reset_debounce, reset_gen_ip, fsl_leds, fsl_random, fsl_event_handler, etc... You can use these examples as good starting points for making your own edk peripherals.
        • Its_Art
          A very simple example which you might want to use as the basis of your game. It has a bitmap memory and an icon rom, etc. As Discussed in class.
        • Brownian_Mouse
          An example of how to use a mouse with an svga display. It shows you how to use a refresh signal from your SVGA peripheral as a Custom event in the event handler. It also shows you how to use all of the commands for the mouse portion of the event handler.
        • Keyboard
          An example of how to use a keyboard. It reads the scancodes from the event handler (with a keyboard attached) and echos them directly onto the Hyperterminal (via the uartlite). It also shows how to use the LEDs on the keyboards, and how to set the keyboard repeat rates.
    3. A System on a Chip
      • Connect four, alpha-beta search
      • EDK Architecture
      • Board evaluation in software
      • Board evaluation in hardware

    Useful stuff

    Useful links

    TEXTBOOK

    Essential VHDL, RTL Synthesis done right
    Sundar Rajan
    ISBN: 0-9669590-0-0

    OTHER RELEVANT TEXTS

    Embedded Sytem Design: a unified hardware/software introduction
    Frank Vahid / Tony Givargis
    Wiley & Sons

    An Embedded Software Primer
    David E. Simon
    Addison Wesley

    Embedded Systems Building Blocks
    Jean Labrosse
    RD Books

    The Designers Guide to VHDL
    Peter Ashenden
    Morgan Kaufman

  • The Computer Science Department Student Information Sheet