| Month | Day | Week | Lecture | Info | |
| Aug | 25 | Mon | Week 1 | Embedded Systems: Introduction | |
| 27 | Wed | VHDL: Introduction | |||
| 29 | Fri | Writing and simulating VHDL | In class demo: Half Adder | ||
| Sep | 1 | Mon | Week 2 | Labor Day | |
| 3 | Wed | CLASS CANCELLED | |||
| 5 | Fri | hardware Background: Combinational Logic | 14:00 Recitation USC 310C Using Modelsim Modelsim tutorial Lab 1(A&B) assigned |
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| 8 | Mon | Week 3 | VHDL: conditional and loop constructs, muxs, decoders, encoders | ||
| 10 | Wed | VHDL behavioral VHDL | |||
| 12 | Fri | FPGA Architecture | |||
| 15 | Mon | Week 4 | Meet Spartan 3 | ISE Demo | |
| 17 | Wed | Software Design Flow Project Navigator (ISE) |
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| 19 | Fri | Sequential Circuits | Lab 1(A&B) due |
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| 22 | Mon | Week 5 | Finite State Machines | Lab 2(A&B) assigned | |
| 24 | Wed | A regular expression scanner Lab 2 discussion |
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| 26 | Fri | Recap and Mock test handout | 14:00 Recitation USC 310C Using ISE Xilinx ISE tutorial |
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| 29 | Mon | Week 6 | Mock test discussed | ||
| Oct | 1 | Wed | Midterm test one | ||
| 3 | Fri | Midterm test one discussion | lab 2 due | ||