Tiling is a widely used loop transformation for exposing coarse grained parallelism or to improve data locality. Use of tiling involves deriving the tiled loop program from the original loop program. Deriving the tiled code is a complex task. There are several tools such as Cloog and Omega which can generate tiled loops when the tile sizes are fixed. However, not fixing the tile sizes, but leaving them as symbolic parameters can enable several install/link/run-time optimizations. TLOG provides an efficient way to generate such parameterized tiled loops.

HiTLOG is a tiled loop generator for perfectly nested loops. It takes an iteration space and tile sizes (either symbolic parameters or constants) at each level as its input and generate tiled loops as output. More details can be found in our forthcoming SC 2007 paper:

DaeGon Kim, Lakshminarayanan Renganarayanan, Dave Rostron, Sanjay Rajopadhye, and Michelle Strout. Multi-level Tiling: M for the Price of One. In SC : Supercomputing, November 2007

TLOG is a code generator. It takes loops as input and generates tiled loops as output. TLOG can generate the tile loops without fixing the tile sizes—they can be left as symbolic parameters. More details can be found in our PLDI 2007 paper:

Lakshminarayanan Renganarayanan, DaeGon Kim, Sanjay Rajopadhye, and Michelle Strout. Parameterized Tiled Loops for Free. In PLDI : ACM SIGPLAN Conference on Programming Language Design and Implementation, June 2007

To download either of these packages, click here