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CSU Photo
CSU Computer Science Professor Wim Bohm with a high-speed circuit board his team used to provide fast performance, optimized to specific applications.
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Ram speed: CSU professors design super fast systems
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3/29/2002 3:50:00 PM
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| By Todd Neff |
Colorado State University computer science professors Wim Bohm, Ross Beveridge and Bruce Draper have delivered to the Department of Defense computer systems capable of processing complex image data hundreds of times faster than Intel’s fastest Pentium chips.
Such a dramatic leap in processing speed could one day give desktop computers the power of supercomputers, offer real-time facial recognition and give Internet routers the horsepower for vastly improved data transfer.
A CSU team comprised of the three professors and several computer science doctorate students worked for four years on the project, which received $1.7 million from the Defense Advanced Research Projects Agency. The DARPA program, which concluded last month, sought to boost the effectiveness of adaptive computing systems and involved what Bohm estimated to be about 50 research institutions.
At the heart of the DARPA program was a type of microprocessor called the field programmable gate array, or FPGA.
Conventional microprocessors are hard-wired and come in two distinct flavors. One is an all-purpose design similar to that of Intel’s Pentium chips, which use the same processing approach for applications as diverse as word processing and video editing.
A second is the application specific integrated circuit, or ASIC, designed and optimized for a specific processing purpose such as remote sensing. If Pentium chips are family minivans, ASICs are top-fuel dragsters.
FPGAs, a third type, are an electronic blank slate. FPGAs are chips whose wiring allows for dynamic reconfiguring based on the need at hand. Though slower than customized ASICs, an FPGA’s malleability leaves all-purpose chips in the dust.
The CSU team delivered two systems to DARPA last October, and both did exactly that.
The first was a ground-based night vision automatic target recognition system. Designed for use in tanks, the system detects objects such as enemy tanks, and displays results on a screen that describes the object and its position. The CSU team’s system did this in less than a second, about 600 times faster than a Pentium III 800 megahertz.
The second was an automatic target recognition pre-screener program that allows Air Force satellites to scan large swaths of land and quickly recognize vehicles and facilities for further military observation. The system recognizes objects roughly 40 times faster than existing systems and, unlike hard-wired chips, can upgraded from Earth.
According to Bohm, the speed comes from application-specific specialization. The tank-based system, for example, was designed to detect three types of vehicles based on models supplied by DARPA. Specialized circuit boards, WildStar Vertex2000Es manufactured by Maryland-based Annapolis Microsystems, contained a processor for each vehicle type, allowing for process parallelism, said Bohm.
But the real speed came from optimizing each FPGA for the specific vehicle type, allowing it to focus narrowly.
This could have been done with an ASIC, and probably faster. But according to Bohm, ASICS can take a year and a half and some $100 million to build. “And if you want to change it, you have to build it all over again,” he said.
The CSU-programmed FPGAs, on the other hand, can reconfigure themselves as new vehicles come along.
But the team’s primary contribution was in its compiler, according to Phil James-Roxby, a staff software engineer at FPGA manufacturer Xilinx in Boulder. Xilinx manufactures the FPGA microprocessors at the heart of the Annapolis Microsystems boards.
While traditional FPGAs were configurable, they were seldom reconfigured. Bohm said FPGAs, developed in the 1980s and refined in the 1990s, have been most common in places such as the junctures of printed circuit boards that connect devices such as memories and CPUs. “If you built a board with 50 FPGAs on it, you only needed to fab one FPGA and then code each little function needed.”
Such FPGAs required machine-level coding, a laborious process relegated to specialized engineers.
Bohm is a specialist in compilers that take computer languages like C or Fortran and translate them into the ones and zeros understood by microprocessors. His team took the notion of the compiler a step further, allowing it to reconfigure the microprocessor itself.
“We’ve tried to make the hardware available to the programmer,” Bohm said. “The goal is for the programmer to write a C program and say, ‘OK, compile it to hardware.’”
The result is an FPGA microprocessor that, were it a vehicle, would morph from minivan to delivery truck to NASCAR speedster depending on the task at hand.
This technology is still in its early days. Bohm said the low-volume Annapolis boards cost about $50,000 each, “not something to put into your PC to make the video run faster.”
But he sees potential applications such as specialized FPGAs in routers that are fast enough to prioritize and monitor traffic that today’s technology struggles just to route along.
James-Roxby said he expects to see Xilinx-powered facial recognition systems of this sort within a year.
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