CS270 Colorado State University ================ Sequential Logic ================ Ch 3.4 through 3.7 --------------------------------------------- Sequential Circuits vs Combinational Circuits Sequential circuits store a value. The output of a combinational circuit only depends on current input. At this point you should be able to answer the following: (9) What is the difference between combinational and sequential circuits? ----------------------- R-S Latch http://www.play-hookey.com/digital/rs_nand_latch.html Stores a single bit. S R a 0 0 not stable 1 1 quiescent, maintains previous value 1 0 0 0 1 1 ----------------------- Gated D Latch http://www.play-hookey.com/digital/d_nand_latch.html Simplifies interface to R-S Latch. Two Inputs D - data WE - write enabled Two Outputs R-S Latch outputs. Does the Gated D Latch ever let both R and S equal 0? Unit testing the gated D latch For a latch (sequential circuit gate), the number of inputs relevant to testing are the inputs and the current stored bits. How many test cases should test_rs_latch.c have? How many test cases should test_d_latch.c have? ----------------------- D Flip Flop http://www.play-hookey.com/digital/d_nand_flip-flop.html Sequential circuits that implement finite state machines are in a loop with combinational logic. It is important that they only change their state on a clock edge. At this point you should be able to answer the following: (10) How are the following circuits constructed and what do they do? r-s latch, d-latch, and d flip-flop (or master-slave flip-flop). ----------------------- Register Stores some number of bits that can be written all at once. ----------------------- Memory Number of locations, each location essentially contains a register of some size. Address Space n bits can address 2^n memory locations Addressability Number of bits stored at each location. word addressable The word size for a machine is typically the register size. ----------------------- Building Memory - store each bit in a gated D Latch - each row of D Latches is a single location - use decoder to translate address to signal to one of the locations - use muxes to grab appropriate bit in a column 2^n by m bit memory At this point you should be able to answer the following: (11) How could you construct a 2^X-by-Y-Bit Memory? What components to you need and how are they organized? How many bits does such a memory contain? ------------------------- Sequential logic circuits Have external and internal inputs. Internal inputs are stored bits. ------------------------- Finite State Machine Has the following properties: - finite number of states - finite number of inputs - finite number of outputs - rules to transition between states based on current state and input - rules for output ---------------------------- Example Finite State Machine --------------------- Implementing FSM in C Enumerated type to indicate possible states. Have variable to maintain current state. While loop until hit one of the final states Switch statement for current state Within each current state case, switch or if statement for possible inputs. At this point you should be able to answer the following: (12) How is a finite state machine implemented in digital logic and in C? ------------------------ mstrout@cs.colostate.edu, 9/10/08