CS270 Colorado State University ===================== The von Neumann Model ===================== Ch 4 --------------------------------------------- Goal questions for the Von Neumann Model (1) What are the components in the von Neumann model and what does each of the components do? (2) What is the relationship between a Turing Machine Model and the von Neumann Model? (3) How can we interpret bits in a memory as 2's complement integers, IEEE floating points, ASCII values, or instructions? (4) Describe the phases that constitute the instruction cycle. (5) How do we determine the number of bits in an instruction that should be used to encode the instruction operation, register values, and other fields in the instruction? (6) What are the possible locations for the opcode bits in an instruction? (7) What happens during each phase of the LC3 instruction cycle for an ADD, JMP, and/or LDR instruction? (8) How can we grab a certain field of bits from a register in digital logic? (9) How can we grab a certain field of bits from a short in C? --------------------------------------------- The von Neumann Model references: http://americanhistory.si.edu/collections/object.cfm?key=35&objkey=30 http://en.wikipedia.org/wiki/Computer http://en.wikipedia.org/wiki/Computer_bug#Etymology Early 1940's first computers being built. If programmable, only by using cards and/or patch cables and switches. 1946, John von Neumann proposed fundamental model for computer capable of processing computer programs. 'In 1947, engineers working on the Mark II computer at Harvard University found a moth stuck in one of the components. They taped the insect in their logbook and labeled it "first actual case of bug being found." The words "bug" and "debug" soon became a standard part of the language of computer programmers.' June 1948, Manchester Small-Scale Experimental Machine, stored program in cathode ray tube memory Components in the model Memory Control Unit Processing Unit Input Output -------------------------------------------------------- Relationship between Turing Machine and von Neuman Model Turing machine components infinite tape finite state machine read/write head -------------------------------------------------------- von Neuman Machine Attributes CPU operates on 1 instruction at a time Stored Program Machine Single sequential memory Data and programs are kept in the same memory ------------- Memory address contents address space LC-3 uses 16-bit addresses word is 16 bits ----------------- Accessing Memory MAR - Memory Address Register MDR - Memory Data Register Operations Read Write ----------------- Processing Unit ALU Performs basic operations: add, and, etc. Typically operates on whole words Registers Holds data for ALU ----------------- Control Unit Coordinates all operations in computer. PC IR ----------------- Instruction LC-3 instruction is represented with 16 bits opcode operands -------- Notation A denotes a sequence of 4 bits: A_3 A_2 A_1 A_0 LC-3 has 16-bit registers. Mem refers to the contents at memory location, or memory address, X ------------------- ADD Example: 0001 010 110 0 00 101 Bits indicate ADD opcode. Bits indicate destination register. Bits and indicate source registers. ----------------- Instruction Cycle 6 phase cycle where each phase is implemented with one or more states in the control unit finite state machine. Fetch Decode Evaluate address Fetch Operands Execute Store Result ------------------ Instruction Design How many instructions? Addressing modes. How many bits needed for each field? Example: If only use two register operands, then how many bits in LC-3 ADD instruction are not used? Exercise: Assume an architecture with 64 general purpose registers. Given a 16-bit instruction, how many register operands are possible in a single instruction? With that many register operands how many opcodes are possible? ----------------- LDR instruction ----------------- JMP instruction ------------------------ Grabbing a field of bits digitally in C ------------------------ mstrout@cs.colostate.edu, 9/17/08