- Introduction
- Course overview
- Embedded Systems overview
- Example Embedded Systems and their Requirements
- Design Challenges, Metrics
- Processor technologies
- IC technology
- Programmable Logic Devices
- FPGA Programming Model
- 3 Abstractions
- VHDL Introduction
- VHDL Entities and architectures
- Standard Logic Vectors
- Signals, In, Out, Inout
- Execution Order, RTL
- Structural, Dataflow, Behavioral
- Hardware background: Combinational Logic
- Wires, Drivers, Transistors, logic gates
- Combinational Logic, Multiplexors, Decoders, Encoders
- VHDL Cont
- A First VHDL Design: XOR3
- ModelSim, Do Files
- Decoders, Encoders
- Generics, Int type, Generates
- LAB1: Ripple
Carry Adder
- Synthesizable, behavioral VHDL constructs
- FPGA Structure
- FPGA architecture
- Configurable Logic Block Structure (CLB), wiring
- On chip wiring: Global routing matrix,
global, long, hex and single lines
- Memory hierarchy: LUTs, Block RAM, external memory controllers
- IO blocks
- The DIGILENT SPARTAN3 board
- Meet SPARTAN3
- The SPARTAN FPGA processor
- Block RAM
- Oscilator, clocks,
- buttons, switches,
- LEDs, Seven segment displays, VGA
- Serial ports, parallel ports, keyboard and mouse ports
- LAB2: Adders on the DIGILENT
- FPGA Design Flow
- Design Entry
- Synthesis
- Place and Route
- Download
- Sequential VHDL
- Flip-flops, Registers
- Sequential processes
- dff.vhd, dreg.vhd,
shift_register.vhd,
shift_register2.vhd,
counter.vhd.
- Finite State Machines
- State types, next/current values, Encoding Schemes
- LAB3: Xmas lights
- Pulse generators and events
- Driving a block of 7 segment displays, ROM tables
- LAB4: Sixty Minutes
- Complex state machines and combinational processes
- SVGA Controller,
SVGA sync,
TopPlaid.vhd
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- EDK Structure
- A soft processor in VHDL: the LC3 LC3 code
- The Xilinx EDK
- Microblaze
- Block RAMs
- Busses, OPB/LMB
- Peripherals, UART, GPIO
- EDK Programming
- Microblaze
- Software debugging, GDB, MDM
- UART, GPIO, detecting button presses
- LAB5:
First EDK Design: knock knock
- Event handlers, timers, FSLs
- Building an SVGA system in the Spartan
- Using BlockRAMs in the SVGA system
- LAB6:
The games people play!!
- You can find some useful examples on the public area on galdalf in the
lab. There should be an icon on your desktop called "public_on_gandalf"
with a picture of a cute little house. It should also be mapped to your P:
drive when you are in the lab. It contains (Among other things):
- EDK_Peripherals
Some example EDK Peripherals, such as the reset_debounce,
reset_gen_ip, fsl_leds, fsl_random, fsl_event_handler, etc... You can use
these examples as good starting points for making your own edk peripherals.
- Its_Art
A very simple example which you might want to use as the basis of your
game. It has a bitmap memory and an icon rom, etc. As Discussed in class.
- Brownian_Mouse
An example of how to use a mouse with an svga display. It shows you
how to use a refresh signal from your SVGA peripheral as a Custom event in
the event handler. It also shows you how to use all of the commands for
the mouse portion of the event handler.
- Keyboard
An example of how to use a keyboard. It reads the scancodes from the
event handler (with a keyboard attached) and echos them directly onto the
Hyperterminal (via the uartlite). It also shows how to use the LEDs on the
keyboards, and how to set the keyboard repeat rates.
- A System on a Chip
- Connect four, alpha-beta search
- EDK Architecture
- Board evaluation in software
- Board evaluation in hardware
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