Archive-name: pc-hardware-faq Last-modified: 1997/11/10 Version: 1.25 This FAQ was compiled and written by Willie Lim and Ralph Valentino with numerous contributions by others. Acknowledgements are listed at end of this FAQ. Copyright notice: The comp.sys.ibm.pc.hardware.* Frequently Asked Questions is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY. No author or distributor accepts responsibility to anyone for the consequences of using it or for whether it serves any particular purpose or works at all, unless he says so in writing. Refer to the GNU General Public License for full details. Everyone is granted permission to copy, modify and redistribute this FAQ, but only under the conditions described in the GNU General Public License. Among other things, the copyright notice and this notice must be preserved on all copies. Where section authors are noted, the copyright is held by that author. Where no author is noted, the copyright is held by the FAQ editors Willie Lim (wlim@lehman.com) and Ralph Valentino (ralf@alum.wpi.edu). Changes, additions, comments, suggestions and questions to: Ralph Valentino ralf@alum.wpi.edu ^^^^ Table of Contents: ==== PART 1 ==== S) 1.0 Introduction Q) 1.1 What does this FAQ cover? Q) 1.2 Where can I find the latest copy of this FAQ? Q) 1.3 Is it ok to (sell/buy/job-offer/advertise) things here? Q) 1.4 I have a binary that people are asking for, should I post it here? Q) 1.5 Where should I post? Q) 1.6 How come no one answers my questions? Q) 1.7 What are the going prices for...? Q) 1.8 Who makes/Where can I find [some obscure piece of hardware]? Q) 1.9 What is the history of the IBM PC? S) 2.0 Motherboards Q) 2.1 >What are the differences between the 80x86 CPUs? Q) 2.2 How do I pick the right processor? Q) 2.3 What is the difference between the 386SX/386DX and 486SX/486DX? Q) 2.4 What is a ZIF socket? Q) 2.5 What is over clocking and should I do it? Q) 2.6 Which is faster, a DX-50 or DX2-66 Q) 2.7 *What is the P24T/Overdrive? Q) 2.8 What are the differences between the 80x87 co-processors? Q) 2.9 Would a math co-processor speed up my machine? Q) 2.10 Can I use a x387 with my 486? Q) 2.11 What is the floating point (FDIV) problem with the Pentium? Q) 2.12 How can I tell if my Pentium has the FDIV bug? Q) 2.13 How do I get a replacement for my buggy Pentium? Q) 2.14 Memory terminology, what does it mean? Q) 2.15 What happen to my 384k? Q) 2.16 How do I tell how big/fast my SIMMs are? Q) 2.17 What speed SIMMs do I need? Q) 2.18 Will 9 chip and 3 chip SIMMs work together? Q) 2.19 What are "single-sided" and "double-sided" 72-pin SIMMs? Q) 2.20 What does parity/ECC memory protect the system from? Q) 2.21 What happens if I get memory error with or without parity/ECC? Q) 2.22 Do I really need parity/ECC? Q) 2.23 How do I get a system with parity support? Q) 2.24 How do you distinguish between parity and non-parity SIMMs? Q) 2.25 Can I use Mac or PS/2 SIMMs in my PC? Q) 2.26 What do wait states and burst rates in my BIOS mean? Q) 2.27 Cache terminology, what does it mean? Q) 2.28 How do I upgrade the size of my cache? Q) 2.29 Do I need to fill the "dirty tag" RAM socket on my motherboard? Q) 2.30 How fast do my cache RAMs have to be? Q) 2.31 Which is the best cache policy, write-through or "write-back?" Q) 2.32 What about an n-way set associative cache, isn't it better? Q) 2.33 Which is better, ISA/EISA/VLB/PCI/etc? Q) 2.34 *What are the (dis)advantages of ISA/VLB/EISA SCSI? Q) 2.35 Will an ISA card work in an MCA (PS/2) machine? Q) 2.36 What does the "chip set" do? Q) 2.37 How do I enter the CMOS configuration menu? Q) 2.38 What is bus mastering and how do I know if I have it? Q) 2.39 Can I put an ISA cards in EISA or VLB slots? Q) 2.40 How should I configure ISA/VLB cards in the EISA config utility? Q) 2.41 What is the difference between EISA Standard and Enhanced modes? Q) 2.42 Is there any point in putting more than 16M in an ISA machine? Q) 2.43 What disadvantages are there to the HiNT EISA chip set? Q) 2.44 *Should I change the ISA bus speed? Q) 2.45 Why is my PC's clock so inaccurate? Q) 2.46 How can I automatically set my PC's clock to the correct time? Q) 2.47 What is the battery for and how do I replace it? Q) 2.48 Can I use IRQ2 or is it special? Q) 2.49 Where do all the IRQ's and DMA Channels go? ==== PART 2 ==== S) 3.0 IO controllers/interfaces Q) 3.1 *How do IDE/MFM/RLL/ESDI/SCSI interfaces work? Q) 3.2 How can I tell if I have MFM/RLL/ESDI/IDE/SCSI? Q) 3.3 Do caching controllers really help? Q) 3.4 Do IDE controllers use DMA? Q) 3.5 Why won't my two IDE drives work together? Q) 3.6 Which is better, VLB or ISA IDE? Q) 3.7 How do I install a second controller? Q) 3.8 >What is EIDE/Fast-ATA/ATA-2/ATAPI what advantages do they have? Q) 3.9 Which is better, SCSI or IDE? Q) 3.10 Can MFM/RLL/ESDI/IDE and SCSI coexist? Q) 3.11 What's the difference between SCSI and SCSI-2? Are they compatible? Q) 3.12 How am I suppose to terminate the SCSI bus? Q) 3.13 Can I share SCSI devices between computers? Q) 3.14 What is Thermal Recalibration? Q) 3.15 Can I mount my hard drive sideways/upside down? Q) 3.16 How do I swap A: and B: Q) 3.17 My floppy drive doesn't work and the light remains on, why? Q) 3.18 What is a 16550 and do I need one? Q) 3.19 Are there any >4 channel serial port cards? Q) 3.20 Should I buy an internal or external modem? Q) 3.21 What do all of the modem terms mean? Q) 3.22 Why does my fast modem connect at a lower speed? Q) 3.23 >What kinds of sound cards are available? Q) 3.24 Where can I find EISA/VLB sound and IO cards? Q) 3.25 Where can I get DOS drivers for my ethernet card? Q) 3.26 How does the keyboard interface work? Q) 3.27 Can I fake a keyboard so my computer will boot without it? ==== PART 3 ==== S) 4.0 Storage/Retrieval Devices Q) 4.1 Why do I lose x Meg on my hard drive? Q) 4.2 *Should I get an IDE/floppy/SCSI/parallel port tape drive? Q) 4.3 I have two floppies. Can I add a floppy based tape drive? Q) 4.4 How fast is a tape drive? Will a dedicated controller improve this? Q) 4.5 What is QIC80, QIC40? Q) 4.6 How come I can't fit as much stuff on my tape drive as they claim? Q) 4.7 Are Colorado/Conner/Archive/... tapes compatible with each other? Q) 4.8 How does the drive/software know how long the tape is? Q) 4.9 What are all those QICs? Q) 4.10 Which QICs are read/write compatible? Q) 4.11 What is the CMOS/jumper setting for my hard drive? S) 5.0 >Video S) 6.0 Systems Q) 6.1 *What should I upgrade first? Q) 6.2 Do I need a CPU fan / heat sink Q) 6.3 What does the turbo switch do? Q) 6.4 How does the front panel LED display measure the system's speed? Q) 6.5 Should I turn my computer/monitor off? Q) 6.6 Are there any manufacturers/distributers who read the net? ==== PART 4 ==== S) 7.0 Diagnostics Q) 7.1 What do the POST beeps mean? Q) 7.2 What do the POST codes mean? Q) 7.3 *I think my cache is bad. What's a good diagnostic? S) 8.0 Misc Q) 8.1 What is the pin out for ...? Q) 8.2 *Where are benchmark programs located. What do they mean? Q) 8.3 What is Plug and Play? Q) 8.4 What is an OEM product? Q) 8.5 What size should I set my DOS partitions to be? Q) 8.6 How do I get DOS to letter my devices the way I want? Q) 8.7 Why won't my system boot from the hard drive? Q) 8.8 How do I clean my computer? Q) 8.9 *What OS's are available for the PC? Which are free? Q) 8.10 *How can I transfer files between my PC and a Unix system? Q) 8.11 What tape backup software is available? Q) 8.12 Why doesn't my new device work as fast as it should? Q) 8.13 My drive lists a MTBF of 300,000 hours. Will it really last 34 years? Q) 8.14 How do I find pin 1 on my chip/card/cable/connector? Q) 8.15 I've run out of power connectors, what can I do? Q) 8.16 What does FCC approval cover and what needs to be approved? S) 9.0 References Q) 9.1 What other FAQ's are out there? ==== PART 5 ==== Q) 9.2 What do the industry acronyms stand for? Q) 9.3 Where can I get the ISA/EISA/VLB/PCI/etc specs? Q) 9.4 What books are available for the PC architecture? Q) 9.5 What books are available on network programming? Q) 9.6 Which companies have ftp sites? Q) 9.7 Which companies have WWW sites? Q) 9.8 What's the phone number for... S) 10.0 Acknowledgments * = incomplete + = new or significant changes since last post > = pointer to one or more other FAQs S) 1.0 Introduction Q) 1.1 What does this FAQ cover? This FAQ covers Frequently Asked Questions from all groups in the comp.sys.ibm.pc.hardware.* hierarchy. Software topics are only included if they are directly related to hardware or hardware interfacing. Q) 1.2 Where can I find the latest copy of this FAQ? If you haven't done so, new users on the net should read news.announce.newusers. In particular, the following posts are a good idea: A Primer on How to Work With The Usenet Community Answers to Frequently Asked Questions About Usenet Hints on Writing Style for Usenet Introduction to The *.answers Groups This FAQ is currently posted to news.answers, comp.answers, comp.sys.ibm.pc.hardware.cd-rom, comp.sys.ibm.pc.hardware.chips, comp.sys.ibm.pc.hardware.comm, comp.sys.ibm.pc.hardware.misc, comp.sys.ibm.pc.hardware.networking, comp.sys.ibm.pc.hardware.storage, comp.sys.ibm.pc.hardware.systems, and comp.sys.ibm.pc.hardware.video. All posts to news.answers are archived and are available via anonymous FTP, uucp and e-mail from the following locations: FTP: FTP is a way of copying file between networked computers. If you need help in using or getting started with FTP, send e-mail to mail-server@rtfm.mit.edu with send usenet/news.answers/ftp-list/faq as the body of the message. location: rtfm.mit.edu [18.181.0.24] directory: /pub/usenet/news.answers/pc-hardware-faq filenames: part1 to part5 location: ftp.uu.net [137.39.1.9] directory: /archive/usenet/news.answers/pc-hardware-faq filenames: part1.Z to part5.Z [use uncompress] location: nic.switch.ch [130.59.1.40] directory: info_service/Usenet/periodic-postings filenames: [Check info_service/Usenet/00index] UUCP: location: uunet!/archive/usenet/news.answers/pc-hardware-faq/ filenames: part1.Z to part5.Z E-mail: Send email to mail-server@rtfm.mit.edu containing these lines: send usenet/news.answers/pc-hardware-faq/part1 ... send usenet/news.answers/pc-hardware-faq/part5 You can find a dozen or more sites in the US, Europe and Japan that store the FAQ and archives for this various newsgroups by using the Internet search programs, Archie or Wais. Q) 1.3 Is it ok to (sell/buy/job-offer/advertise) things here? No, none of the above fit within the charter of the comp.sys.ibm.pc.hardware.* hierarchy, therefore such posts are considered unacceptable. For buying/selling things, use groups with the words 'wanted' or 'forsale', and for job offers, use groups with the words 'jobs'. All of these can be found in the misc.* hierarchy. For commercial advertisements, use only the biz.* hierarchy as per the guidelines of USENET. (refer to the news.* groups for more information). Q) 1.4 I have a binary that people are asking for, should I post it here? Never post binaries to technical discussion groups. If you absolutely must distribute a binary, you are ENTIRELY sure that it is legal to do so and it is not currently available via ftp then, in order of preference: 1. Privately offer to mail it to the person (if only a few people are looking for it). Don't blindly mail it to anyone making a general request until you offer and they accept. 2. Place it on an anonymous ftp site and, once it is there, post a pointer to it. To find an anonymous ftp site, scan a few groups, they always pop up. 3. Post it to comp.binaries.ibm.pc (moderated), wait for it to be approved, and then post a pointer to it. Q) 1.5 Where should I post? [From: grohol@alpha.acast.nova.edu (John M. Grohol)] PC-Clone Hardware Newsgroup Pointer By: John M. Grohol This Pointer will help you find the information you need and get your questions answered much quicker than if you were to simply crosspost to every hardware newsgroup in existence. It is provided as a public service. Post your article in the most appropriate newsgroup according to its topic. Please do not post your hardware questions to software newsgroups, and vice versa. "For Sale" articles are never appropriate to either the hardware or software newsgroups. Comments & suggestions are always welcome! Question on... Post to... ----------------------------------- ---------------------------------- Networking/networks comp.os.netware.* (where * equals: announce; connectivity; misc; security) comp.dcom.lans.* (where * equals: ethernet; fddi; misc; token-ring) comp.protocols.tcp-ip.ibmpc comp.os.os2.networking.misc comp.os.os2.networking.tcp-ip comp.os.ms-windows.networking.* (where * equals: misc; ras; tcp-ip; windows) All NFS-based networking comp.protocols.nfs All SMB-based networking (LANman, LANserver, WNT, Samba, etc) comp.protocols.smb PC Networking hardware/cards/cables comp.sys.ibm.pc.hardware.networking ----------------------------------- ---------------------------------- Home-built personal computers alt.comp.hardware.pc-homebuilt Laptops & notebooks (over 3 lbs.) comp.sys.laptops Palmtops (under 3 lbs.) comp.sys.palmtops ----------------------------------- ---------------------------------- Servers comp.dcom.servers Modems comp.dcom.modems Printers comp.periphs.printers SCSI devices comp.periphs.scsi Other peripherals comp.periphs PCMCIA devices alt.periphs.pcmcia ----------------------------------- ---------------------------------- Acer users & support alt.sys.pc-clone.acer Dell users & support alt.sys.pc-clone.dell Gateway 2000 users & support alt.sys.pc-clone.gateway2000 Micron users & support alt.sys.pc-clone.micron Zenith users & support comp.sys.zenith Zeos users & support alt.sys.pc-clone.zeos ----------------------------------- ---------------------------------- Technical topics on PC soundcards comp.sys.ibm.pc.soundcard.tech Advocacy for a particular soundcard comp.sys.ibm.pc.soundcard.advocacy Using soundcards with games comp.sys.ibm.pc.soundcard.games Music & sound using soundcards comp.sys.ibm.pc.soundcard.music Soundcards in general comp.sys.ibm.pc.soundcard.misc ----------------------------------- ---------------------------------- Discussion of forsale items misc.forsale.computers.discussion Mac-specific sale of items misc.forsale.computers.mac-specific.* (where * equals: cards.misc;misc; cards.video;portables;software; systems) Sale of all computer memory, misc.forsale.computers.* modems, monitors, net-hardware, (where * equals: memory;modems; printers, storage devices monitors;net-hardware;printers;storage) Sale of other computer items misc.forsale.computers.other.* (where * equals: misc;software;systems) PC-specific sale of items misc.forsale.computers.pc-specific.* (where * equals: audio;cards.misc; cards.video;misc;motherboards; portables;software;systems) Commercial sale of hardware biz.marketplace.computers.* (where * equals: pc-clone;mac;other; workstation;discussion) ----------------------------------- ---------------------------------- Monitors/video cards comp.sys.ibm.pc.hardware.video Modems/fax cards/communication comp.sys.ibm.pc.hardware.comm Hard/floppy/tape drives & media comp.sys.ibm.pc.hardware.storage CD-ROM drives & interfaces comp.sys.ibm.pc.hardware.cd-rom Computer vendors & specific systems comp.sys.ibm.pc.hardware.systems System chips/RAM chips/cache comp.sys.ibm.pc.hardware.chips ----------------------------------- ---------------------------------- Other hardware questions comp.sys.ibm.pc.hardware.misc ----------------------------------- ---------------------------------- This Pointer is freely distributable to any other mailing list, newsgroup, or network service provider as long as it remains fully intact. Copyright 1994-1996 John M. Grohol. All rights reserved. Send comments/questions/suggestions regarding this Pointer to the author (replying to this message should work). Do *not* include this entire Pointer in your reply, or it may not be read. Q) 1.6 How come no one answers my questions? If you don't give enough information when asking your question, then people will not be able to answer it. If you're not willing to take the time to look up the necessary information, then why should you expect people to take the time to answer your question? For instance, if you're asking a question about SCSI, it is very important to know what type of SCSI host adapter (controller) you have. Some other important things to mention are which device drivers/tsr's you are loading, what other similar devices you have in your system, and exactly what in your setup has changed since it last worked. Q) 1.7 What are the going prices for...? If you're looking for new equipment, pick up a copy of Computer Shopper. This is the "bible" for buying new equipment. Skim through it for the best prices and give these distributers a call. In most cases, the advertisements must be placed months in advance; the actual price may be even lower than the advertised price! Two other things to note are the warranty, return policy and location of the company (companies within the same state as you may be required to add extra sales taxes). If you're looking for the expected price of used equipment, then scan the newsgroup misc.forsale.computers.pc-clone for similar items. This will give you the best idea as what to expect. Don't make assumptions that the price of used equipment will follow the market trends of new equipment. For instance, when new memory prices nearly doubled, the used prices were barely effected. Q) 1.8 Who makes/Where can I find [some obscure piece of hardware]? [From: rbean@execpc.com (Ron Bean)] You can ask on the net, but you'll get a better response if you do some investigating on your own first. Try calling vendors who advertise similar or related hardware, they often have things that aren't in the ads. Vendors who specialize in parts rather than complete systems are a good bet. You can also ask local dealers to check their wholesale sources. Q) 1.9 What is the history of the IBM PC? [From:] Around 1978 and '79, the market served by IBM's Data Entry Systems division began to change. Instead of terminals and minicomputers or mainframes, customers began demanding autonomous, low cost, single-user computers with minimal compute power or connectivity, but compliance to standards like the ASCII alphabet and the BASIC programming language. The closest product in IBM's line was the 5110, a closed, BASIC-in-ROM machine with a tiny built-in character display. The 5110 was uncompetitive, and IBM started losing bids from key customers, mostly government agencies. Data Entry commissioned a consulting firm (Boca Associates?) to design a stop-gap machine to fill what was perceived within IBM as a short-lived, specialized niche. It was intended that the stop-gap machine would only be offered for a couple of years until it would be replaced in "The Product Line" by an internal IBM design. Some IBM executives believed the single-user desktop system was a fad which would die out when the shortcomings of such systems became appreciated. The motherboard design was based very closely on a single-board computer described in a 1978 (?) Intel application note. (Anybody got an original copy of this collector's item? Among other things, Intel argues that 640KB is more memory than single-user applications will ever need, because of the efficiency of segmented memory "management"!) The expansion slot "bus" is based on an Intel bus called Multibus 1, which Intel introduced in its microprocessor software development equipment in the mid '70s. The Monochrome and Color Graphics Display Adapters are based on application notes for the Motorola 6845 video controller chip, except that the strangely interlaced pixel addresses in the CGA appears to have been extremely short sighted. The "event driven" keyboard is an original design, but the concept is from the Xerox Alto and Star graphics workstations. The keyboard noise and "feel" are intended to emulate those of the IBM Selectric typewriter. The Cassette Interface design is original, but similar in concept to the one on the Radio Shack TRS-80. Data Entry Division approached Digital Research Inc. to offer its popular CP/M-86 operating system on the machine, but DRI rebuffed them. IBM's second choice was BASIC-in-ROM vendor Microsoft, which had no OS product at the time but quickly purchased a crude disk operating system called 86-DOS from Seattle Computer Products to offer it to IBM. Its command interpreter was an imitation of Unix' Bourne Shell, with the special characters changed to avoid infringing AT&T's rights. Data Entry Division began bidding this system in various State procurements, without any plan to offer it to the public. It became obvious that the Cassette Interface and optional 360KB Flexible Disk Drive were inadequate. The Cassette Interface was dropped, and an optional Fixed Disk Drive offered on a revised model known as the IBM Personal Computer XT. (A fixed, or "hard" disk had been offered on the PC by special order, with a Xebec controller, but few were sold.) The disk controller was designed around the Western Digital 1010 chip, and its design is taken directly from a WD application note. The XT succeeded beyond all expectations. IBM offered the system to the public after it became clear that no other division was going to come up with anything timely. IBM published complete schematics and ROM listings, encouraging clones. In 1984, IBM introduced an upwardly compatible model based on the Intel 80286. The expansion slot "bus" was extended to 16-bit data path width the same way Intel had extended Multibus: by adding data and address bits, a signal for boards to announce their capability to perform 16-bit transfers, and byte swapping on the motherboard to support the 8-bit boards. S) 2.0 Motherboards Q) 2.1 >What are the differences between the 80x86 CPUs? This section is posted separately as the "Personal Computer Chiplist" and archived along side this FAQ. Refer to section one for instructions on retrieving this file. Newsgroups: comp.sys.ibm.pc.hardware.chips,comp.sys.ibm.pc.hardware.systems, comp.sys.ibm.pc.hardware.misc,comp.sys.intel Subject: Personal Computer CHIPLIST 7.0 part * of * From: offerman@einstein.et.tudelft.nl (Aad Offerman) Summary: This list contains the various CPU's and NPX's and their features, used in the IBM PC, IBM PC/XT, IBM PC/AT, IBM PS/2 and compatbles, and the differences between them. Archive-name: pc-hardware-faq/chiplist Q) 2.2 How do I pick the right processor? [From: jabram@ichips.intel.com (Jeff Abramson)] This is a hard question. You have tradeoffs between price, performance, compatibility, upgradebility, and power consumption. As a desktop unit owner, you probably have less concerns about power, but as a laptop owner, this is very important. The frequency of the CPU defines how fast its internal clock runs. This defines how fast instructions are executed. In many ways, this is meaningless, because a RISC machine (MIPS) running at 100MHz may in reality be slower than a 50Mhz i486 because a RISC system must execute more instructions to perform the same function (in some cases). Even when comparing processors in the same family, this info can be misleading. For example, an Intel486-25 is faster than an AMD386-40, since the 486 has microarchitectural advancements over the 386. The same can be said for the Pentium, where a 66Mhz Pentium is twice as fast as a 66MHz 486. For compatibility, keep in mind that the Intel parts are the basis for all of these processors. Therefore you always run the risk that an imitator's part may not be compatible. AMD [486] chips are compatible because they are copied. For some of you, these factors may be important. As far as upgradability goes, this depends on both your motherboard and the processor. If you purchase a 486DX, then you can upgrade to a DX2 and double your internal clock simply by buying an overdrive chip if your motherboard has the ZIF socket. If it doesn't then you can replace the CPU with a DX2. Many new 486 motherboards contain overdrive sockets for the Pentium chip that is pin compatible. Q) 2.3 What is the difference between the 386SX/386DX and 486SX/486DX? [From: jabram@ichips.intel.com (Jeff Abramson)] The Intel386DX contains full 32 bit buses for external data, internal data, and address. The Intel386SX contains a smaller 16 bit external data bus, and a smaller 24 bit address bus. The Intel486DX contains a floating point unit, the Intel486SX does not. A common rumor is that the 486SX is simply a DX part that has a failure in the floating point unit, so it has been disabled and the part has been produces as an SX. This was true for early production parts and samples, but not for the mass produces SX parts that we see today. Q) 2.4 What is a ZIF socket? [From: jabram@ichips.intel.com (Jeff Abramson)] ZIF stands for Zero Insertion Force, and describes a socket on your motherboard that supports an upgrade processor (overdrive processor). In general, an overdrive upgrade works in conjunction with your original processor so you cannot remove the original processor after upgrade. NOTE: Some motherboards do not have a ZIF socket so you must replace the existing processor to upgrade. Q) 2.5 What is over clocking and should I do it? [From: jabram@ichips.intel.com (Jeff Abramson)] Overclocking is a term generally used to describe how you have increased the clock frequency on your board to run your system at a higher speed. For example, if you plug a 25MHz i486 into a board that is configured to run a 33MHz i486, then you are overclocking your CPU. Most boards allow you to configure your clocking via jumpers, and others require a new clock oscillator. Although users have had success with overclocking, it is a dangerous practice for two reasons. First, the chip has been designed to meet a certain speed. Therefore, some circuits do not have the margin to operate at a higher frequency. The chips coming from a wafer have various speed specs (statistical distribution), so you may be lucky and own a CPU that has the circuit margins you need to overclock. But you don't know - and if you overclock, you may get data failure. The data failure may be reproducable - and therefore avoidable, but most likely not. Second, you have reliability concerns when overclocking. Overclocking means faster frequency, which means more current and power. This can lead to real failures in your CPU. Electromigration is one such failure where metal lines in your CPU will actually break or connect if they get too much current. This is irreversable, and most likely not covered under warranty. So when can you overclock? Really only if you don't care about burning out your CPU and you don't care if you get wrong data every now and then. If you own a machine and you use it just for games, then overclocking may be something to try - and you simply upgrade to a new CPU when you burn out the current one. Otherwise, it's not worth the small performance gain. Q) 2.6 Which is faster, a DX-50 or DX2-66 The two processors are relatively close for overall usage. The DX-50 has more I/O bandwidth and the DX2-66 has more computational power. Q) 2.7 *What is the P24T/Overdrive? Q) 2.8 What are the differences between the 80x87 co-processors? See reference in: "What are the differences between the 80x86 CPUs?" Q) 2.9 Would a math co-processor speed up my machine? [From: jruchak@mtmis1.mis.semi.harris.com (John Anthony Ruchak)] If you do a lot of number-crunching with CAD/CAM applications, spreadsheets, and the like, a math co-processor is likely to increase performance. If on the other hand, your primary work is word processing, a math co-processor will have barely any effect at all. Also, a math co-processor will not provide any benefit if your CPU already has one built-in (486/586-DX chips). In addition, a math co-processor is not likely to improve the over-all performance of Microsoft Windows, except when you are running the afore-mentioned number-crunching programs. Q) 2.10 Can I use a x387 with my 486? [From: Shaun Burnett (burnesa@cat.com)] No, they are not pin compatible. The 486DX and above contain an on-chip floating point unit. Therefore, a 387 (SX or DX) math coprocessor is not needed. All software written for a 387 coprocessor will run on your 486. If you want a math coprocessor for a 486SX, you need to purchase the 487SX or a 486 Overdrive processor. While we're talking about math coprocessors, I'll make a brief note about the Weitek. Some motherboards may have a socket for a Weitek math coprocessor. These coprocessors are not compatible with the Intel 387 math coprocessor and should only be used if your software requires it. The Weitek 3167 replaced the Weitek 1167 and is for the 386 while the Weitek 4167 is for a 486. Q) 2.11 What is the floating point (FDIV) problem with the Pentium? Under certain circumstances, based on divisor ranges, mantissa bit 13 and beyond can be incorrect during floating point division. This problem effects the functions: FDIV, FDIVR, FPTAN, FPATAN, FPREM and FPREM1 in single, double and extended precision modes. Many programs and operating systems are already incorporating software patches to work around the problem. For most users, the accuracy supplied by the Pentium even without a patch is more than enough. However, since the media hype made the problem sound like it would have a serious impact on everyone, Intel has agreed to replace all faulty Pentiums free of charge. Q) 2.12 How can I tell if my Pentium has the FDIV bug? If you purchased your Pentium in 1994 or earlier, chances are near 100% that it has the problem. Purchasing it after this date does not guarantee a bug free CPU. The problem existed in all speed grades. The program: ftp.intel.com:/pub/IAL/pentium/$cpuid.exe - executable ftp.intel.com:/pub/IAL/pentium/cpuidf.txt - instructions is Intel's official program to identify CPUs with the FDIV bug. This program uses the CPU ID register to compare against the list of known buggy Pentiums rather than attempting to reproduce the bug through software, so it should be accurate even if the OS has a software FDIV patch already in place. Q) 2.13 How do I get a replacement for my buggy Pentium? >From the US and Canada, call 1-800-628-8686. For other countries, see the file: ftp.intel.com:/pub/IAL/pentium/cpusup.txt Be sure to have your credit card handy. Intel won't place any charges on it as long as you return the defective Pentium within 30 days. If you don't have a credit card, contact Intel and they will refer you to a local service center. Q) 2.14 Memory terminology, what does it mean? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] Read/write memory in computers is implemented using Random Access Memory chips (RAMs). RAMs are also used to store the displayed image in a video board, to buffer frames in a network controller or sectors in a disk controller, etc. RAMs are sold by their size (in bits), word width (how many bits can you access in one cycle), and access time (how fast you can read a location), among other characteristics. SRAMs and DRAMs --------------- RAMs can be classified into two types: "static" and "dynamic." In a static RAM, each bit is represented by the state of a circuit with two stable states. Such a "bistable" circuit can be built with four transistors (for maximum density) or six (for highest speed and lowest power). Static RAMs (SRAMs) are available in many configurations. (Almost) all SRAMs have one pin per address line, and all of them are able to store data for as long as power is applied, without any external circuit activity. In a dynamic RAM (DRAM), each bit is represented by the charge on a *very* small (30-50 femptofarads) capacitor, which is built into a single, specialized transistor. DRAM storage cells take only about a quarter of the silicon area that SRAM cells take, and silicon area translates into cost. The cells in a DRAM are organized into rows and columns. To access a bit, you first select its row, and then you select its column. Unfortunately, the charge leaks off the capacitor over time, so each cell must be periodically "refreshed" by reading it and writing it back. This happens automatically whenever a row is accessed. After you're finished accessing a row, you have to give the DRAM time to copy the row of bits back to the cells: the "precharge" time. Because the row and column addresses are not needed at the same time, they share the same pins. This makes the DRAM package smaller and cheaper, but it makes the problem of distributing the signals in the memory array difficult, because the timing becomes so critical. Signal integrity in the memory array is one of the things that differentiate a lousy motherboard from a high quality one. EDO RAM ------- Extended Data Out is a minor variation on the control logic in the DRAM chip that tells the output pin when to turn on. In a "standard" (Fast Page Mode) DRAM, the output pin turns off as soon as the Column Address Strobe (CAS) pin goes false. The problem with that comes when you try to do a "burst" read cycle wherein Row Address Strobe (RAS) is held true while CAS toggles up and down real fast. The RAM only drives the data half the time and the other half the time is wasted. This makes a cache fill cycle take longer than it otherwise might, because the cache really can't look at the data unless the DRAM is driving it. (You can't store data on a PC board trace because of inductive kick and other effects. Trust me, you novice board designers out there.) In an EDO (Nippon Electric Corp calls it Hyper Page Mode) DRAM, the output pin keeps driving until RAS and CAS *both* go false. Your cache can fill faster because the whole duration (grossly oversimplifying) is usable as sampling time. (Why didn't they do it that way to begin with, some of you are asking. The EDO DRAM can't read and write in the same RAS cycle. The FPM can. That used to be important, but it's not a capability that PCs with caches happen to use.) With today's (cost-oriented) SRAM and ASIC technology, only synchronous SRAMs can take much advantage of the extra bandwidth. That's why you don't get a big benchmark boost when you switch to EDO but leave your cache the way it was before. You have to upgrade both to see the improvement. Because it's a minor control variation, the chip maker can do most of the wafer fabrication steps before deciding whether a wafer full of chips will be FPM or EDO. Both types can be made on the same process and circuit design, and tested on the same equipment. Therefore, once they all tool up to make it, EDO and FPM will cost about the same. Right now (July '95) EDO costs more only because it's still rare. SIMMs and SIPPs --------------- Through the 1970s, RAMs were shipped in tubes, and the board makers soldered them into boards or plugged them into sockets on boards. This became a problem when end-users started installing their own RAMs, because the leads ("pins") were too delicate. Also, the individual dual in-line package (DIP) sockets took up too much board area. In the early 1980s, DRAM manufacturers began offering DRAMs on tiny circuit boards which snap into special sockets, and by the late '80s these "single in-line memory modules" (SIMMs) had become the most popular DRAM packaging. Board vendors who didn't trust the new SIMM sockets used modules with pins: single inline pinned packages (SIPPs), which plug into sockets with more traditional pin receptacles. PC-compatibles store each byte in main memory with an associated check bit, or "parity bit." That's why you add memory in multiples of nine bits. The most common SIMMs present nine bits of data at each cycle (we say they're "nine bits wide") and have thirty contact pads, or "leads." (The leads are commonly called "pins" in the trade, although "pads" is a more appropriate term. SIMMs don't *have* pins!) At the high end of the PC market, "36 bit wide" SIMMs with 72 pads are gaining popularity. Because of their wide data path, 36-bit SIMMs give the motherboard designer more configuration options (you can upgrade in smaller chunks) and allow bandwidth-enhancing tricks (i.e. interleaving) which were once reserved for larger machines. Another advantage of 72-lead SIMMs is that four of the leads are used to tell the motherboard how fast the RAMs are, so it can configure itself automatically. (I do not know whether the current crop of motherboards takes advantage of this feature.) "3-chip" and "9-chip" SIMMs In 1988 and '89, when 1 megabit (1Mb) DRAMs were new, manufacturers had to pack nine RAMs onto a 1 megabyte (1MB) SIMM. Now (1993) 4Mb DRAMs are the most cost-effective size. So a 1MB SIMM can be built with two 4Mb DRAMs (configured 1M x4) plus a 1Mb (x1) for the check-bit. VRAMs ----- In graphics-capable video boards, the displayed image is almost always stored in DRAMs. Access to this data must be shared between the hardware which continuously copies it to the display device (this process is called "display refresh" or "video refresh") and the CPU. Most boards do it by time-sharing ordinary, single-port DRAMs. But the faster, more expensive boards use specialized DRAMs which are equipped with a second data port whose function is tailored to the display refresh operation. These "Video DRAMs" (VRAMs) have a few extra pins and command a price premium. They nearly double the bandwidth available to the CPU or graphics engine. (As far as I know, the first dual-ported DRAMs were built by Four- Phase Systems Inc., in 1970, for use in their "IV-70" minicomputers, which had integrated video. The major DRAM vendors started offering VRAMs in about 1983 [Texas Instruments was first], and workstation vendors snapped them up. They made it to the PC trade in the late '80s.) Speed ----- DRAMs are characterized by the time it takes to read a word, measured from the row address becoming valid to the data coming out. This parameter is called Row Access Time, or tRAC. There are many other timing parameters to a DRAM, but they scale with tRAC remarkably well. tRAC is measured in nanoseconds (ns). A nanosecond is one billionth (10 e-9) of a second. It's so difficult to control the semiconductor fabrication processes, that the parts don't all come out the same. Instead, their performance varies widely, depending on many factors. A RAM design which would yield 50 ns tRAC parts if the fab were always tuned perfectly, instead yields a distribution of parts from 80 to 50. When the plant is new, it may turn out mostly nominal 70 ns parts, which may actually deliver tRAC between 60.1 ns and 70.0 ns, at 70 or 85 degrees Celcius and 4.5 volts power supply. As it gets tuned up, it may turn out mostly 60 ns parts and a few 50s and 70s. When it wears out it may get less accurate and start yielding more 70s again. RAM vendors have to test each part off the line to see how fast it is. An accurate, at-speed DRAM tester can cost several million dollars, and testing can be a quarter of the cost of the parts. The finished parts are not marked until they are tested and their speed is known. Q) 2.15 What happen to my 384k? The memory between 640k and 1Meg is used for the BIOS, the video aperture, and a number of other things. With the proper memory manager, DOS can take advantage of it. Many systems, however, won't identify its existence on boot. This does not mean it isn't there. Q) 2.16 How do I tell how big/fast my SIMMs are? Individual DRAMs are marked with their speed after they are tested. The mark is usually a suffix to the part number, representing tens of nanoseconds. Thus, a 511024-7 on a SIMM is very likely a 70 ns DRAM. (vendor numbering scheme table to be added) Q) 2.17 What speed SIMMs do I need? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] There is no reliable formula for deriving the required RAM speed from the clock rate or wait states on the motherboard. Do not buy a motherboard that doesn't come with a manual that clearly specifies what speed SIMMs are required at each clock rate. You can always substitute *faster* SIMMs for the ones that were called out in the manual. If you are investing in a substantial quantity of RAM, consider buying faster than you need on the chance you can keep it when you get a faster CPU. That said, most 25 MHz and slower motherboards work fine with 80 ns parts, most 33 MHz boards and some 40 MHz boards were designed for 70 ns parts, and some 40 MHz boards and everything faster require 60 ns or faster. Some motherboards allow programming extra wait states to allow for slower parts, but some of these designs do not really relax all the critical timing requirements by doing that. It's much safer to use DRAMs that are fast enough for the no-wait or one-wait cycles at the top end of the motherboard's capabilities. Q) 2.18 Will 9 chip and 3 chip SIMMs work together? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] Almost always. But there are exceptions. 1. Some motherboards do not supply enough refresh address bits for a 4Mb x1 or a 1Mb x4 DRAM. These old motherboards will not work with 4 MB 9-chip SIMMs or 1 MB 3-chip SIMMS. 2. Some EL CHEAPO motherboards do not have proper terminations on the lines which drive the DRAM array. These boards may show only marginal compatibility with various SIMMs, not working with all prefectly good SIMMs you try, favoring SIMMs with parameters skewed towards one end or another of the allowed ranges. In some cases, most of the SIMMs you happen to try might be 9-chip modules, and in other cases they might be 3-chip modules. A random selection of a dozen SIMMs might lead you to conclude the motherboard doesn't "work" with 3-chip modules, or with a "mixture" of 3-chip and 9-chip modules. You might find the real solution is to use SIMMs one speed faster than the manual calls for, because the particular motherboard design just cuts too many things too close. Q) 2.19 What are "single-sided" and "double-sided" 72-pin SIMMs? [From: rbean@execpc.com (Ron Bean)] All 72-pin SIMMs are 32 bits wide (36 with parity), but double-sided SIMMs have four RAS (Row Address Strobe) lines instead of two. This can be thought of as two single-sided SIMMs wired in parallel. But since there is only one set of data lines, you can only access one "side" at a time. Usually, 1Mb, 4Mb, and 16Mb 72-pin SIMMs are single-sided, and 2Mb, 8Mb, and 32Mb SIMMs are double-sided. This only refers to how the chips are wired-- SIMMs that are electrically "single-sided" may have chips on both sides of the board. Most 486 motherboards use memory in banks of 32 bits (plus parity), and may treat a double-sided SIMM as "two banks" (see your motherboard's manual for details). Some can take four SIMMs if they're single-sided, but only two if they're double-sided. Others can take four of either type. Pentium (and some 486) motherboards use pairs of 72-pin SIMMs for 64-bit memory. Since double-sided SIMMs can only access 32 bits at a time, you still need to use them in pairs to make 64 bits. Q) 2.20 What does parity/ECC memory protect the system from? [From: gnewman@world.std.com (Gary Newman)] Memory errors are categorized as either "HARD" failures, or "SOFT" failures. Either form of failure can cause anything from an unexplained system crash to a nice warning message saying: "soft error corrected at address 0x00343487 pattern 0x0004000" The methods that have been developed to deal with these failures are outlined here. HARD ERRORS occur when one or more bits in a memory consistently read back different data than is written to them. There are a myriad of causes for these failures including failed: memory cells, memory chips, solder connections, SIMM socket connections, and circuit traces. Hard errors are signs of truly broken hardware and require physical repair to correct. If you are lucky, simply removing and reinserting a SIMM in its socket is sufficient to make a better connection. Usually it means you have a bad memory chip or motherboard. SOFT ERRORS occur when one or more bits in a memory read back different data than was written to them, BUT after rewriting the same data the memory reads it back correctly. In other words: the error is transient and not reproducible. Soft errors are usually intermittent with anywhere from hours to years between occurrences. There are two design causes for soft errors, motherboard noise and internal DRAM noise due to alpha particles or marginal circuits. On a well designed motherboard, noise does not cause measurable soft errors unless the board is defective. Both soft errors and hard errors can be caused by static electricity damage or otherwise defective parts. Unfortunately these problem parts don't always cause instant hard errors. Failures can appear weeks or months after initial damage as soft (due to degraded performance) or hard errors. "Burn in" (which is heavy exercise of hardware for it's first few days) is a method used by manufacturers to weed out these failures at the factory. Users of computers can also "change the design" of their computer without understanding the ramifications of what they are doing. Adding "SIMM converters" to fit 30 pin SIMMs into a 72 socket, decreasing the DRAM refresh rate, overclocking, and changing the DRAM access timing all can push a design beyond allowable specifications. The problems frequently show up as parity errors, or on a system without parity just as system flakiness. INTERNAL DRAM NOISE is caused by two different sources. Marginal circuits on the DRAM are one source that quality manufacturers nearly always find at the factory through testing of the parts. HOWEVER, SOME MARGINAL DRAM MAKES IT TO MARKET! The result is a part that produces a soft error more often than normal (see below). A system of mine had such a part that produced a single bit error (always in the same DRAM chip of a SIMM) once a month. ALL DRAM PRODUCES SOFT ERRORS DUE TO ALPHA PARTICLES. The plastic packaging of the DRAM contains small amounts of radioactivity that produce alpha particles. These are energetic, fast moving, helium atoms which are missing their electrons. When an alpha particle emitted by the packaging hits a sense line in the DRAM during a read cycle, the noise it produces causes the sense amplifier to misread the data. Then, as with all DRAM, the memory cell is refreshed after reading and the bad data becomes permanent. Memory Error Likelyhood In 1990, alpha particle induced soft errors occurred in 16 Mb computer systems at the mean rate of roughly one error every 3 months. Improved DRAM designs have greatly reduced that error rate so that today the mean error rate in a 16 Mb system is roughly one bit error every 16 years. Note that since the errors only occur when memory is being read, faster access rates to memory make for shorter times between errors. When a computer is idle, the only DRAM access is due to infrequent memory refresh cycles. When a program is constantly reading from memory at the maximum memory bandwidth, bit errors occur more frequently. With computers DESIGNED to produce memory errors at a rate of roughly one bit error per system per 16 years, manufacturers have been cutting costs by not including "parity" memory with systems they sell. THIS ERROR RATE PRODUCES A SINGLE BIT ERROR DURING A TYPICAL THREE MONTH WARRANTY IN 1.6 PERCENT OF ALL THE COMPUTERS SOLD! There are two main risks of using a system without parity memory. One is that the computer user will have no warning when a memory error (soft or hard) has occurred, and the other is that side effects of the error may be hard to isolate. A single bit error can produce side effects such as: a wrong result in a spreadsheet, erroneous data in a database, a bug in the instructions of an application program or operating system causing mysterious system crashes. With 100 million computers in use today, we should expect roughly 6 million single bit errors per year. Computer hardware and software companies must receive thousands of "side effect" bug reports and support calls due to memory errors alone. The costs of NOT including parity memory must be huge! Q) 2.21 What happens if I get memory error with or without parity/ECC? [From: gnewman@world.std.com (Gary Newman)] Memory diagnostics and Power On Self Tests (POSTs) find only hard errors WHEN THE USER LOOKS FOR THEM. The POST only reports these errors when a computer is booted. So unless a memory diagnostic program is run by the user, a hard memory error may go undetected until the next reboot. The effects of an error can spread far and wide during that time. Some systems BIOS allows the user to disable POST to speed up reboot. Beware that doing this can cause widespread data corruption if a hard error is present on a system without parity memory. The ONLY method of finding hard or soft memory errors during operation is the use of PARITY MEMORY. This is simply the addition of one extra bit for every byte of memory to the computer, increasing memory SIMM costs by about 10% due to packaging economics. For a 16 Mb memory today parity adds about $50 to the end user price of the computer system. SOFTWARE CANNOT REPLACE THE FUNCTION OF PARITY MEMORY! In its simplest form, hardware already in all computers manufactured today uses information in the parity memory. This allows it to detect any single bit memory errors before the computer can make any use of the bad data. Use of parity memory prevents the error from propagating and producing side effects. The only user unfriendly aspect to this is that computers without ECC (see below) can only halt the running program to prevent the use of the bad data. However, that is almost always better, and less costly, than allowing the spread of bad data. At its best, the OS on the computer system can display a warning that a memory error occurred in a specific SIMM and that the program is being halted. This is typical for the Unix OS. If the error occurs in the OS itself, the whole system is halted. The MSDOS operating system appears to leave the problem to the system's BIOS to deal with. The better BIOSs will display a message and halt. The worst will simply freeze. All of these alternatives are better and less costly, than allowing the spread of bad data. It is interesting to note that Pentium computers access memory 64 bits at a time, allowing use of Error Correcting Circuits (called ECC) when parity memory is included. The cost of adding ECC to the memory interface chips is modest, and most server computers have done this. The result is that soft errors can not only be detected, but also corrected on the fly without effecting the running programs. Computers that do this produce warning messages such as: "soft error corrected at address 0x00343487 pattern 0x0004000" so you know which SIMM produced the error. Frequent errors in the same SIMM indicate a bad memory chip. That's how we found the SIMM that produced one error a month for three months straight! Single bit hard errors can also be corrected on the fly. A single burned out memory bit or bad SIMM pin is "worked around" by the ECC. No need to fix it until a convenient time comes around. What about errors that parity let's slip by? Those are double bit errors and are thus expected once every few thousand years. Perhaps double bit errors will become important when there are billions of computers in use... or gigabytes of DRAM on the average computer. Q) 2.22 Do I really need parity/ECC? [From: gnewman@world.std.com (Gary Newman)] Perhaps the lack of widespread knowledge about memory errors is the cause of the near eradication of parity memory. In that case, I hope the above has helped spread the word about an inexpensive time, money, and anxiety saver. Computers based on the Intel Triton (Triton-I) chipset CANNOT DETECT MEMORY ERRORS. In other words, Intel chose to not support parity memory with this chipset. Beware that buying a system based on Triton will leave you no future way to add parity error detection to your system. For any computer system where it's worth spending $50 to avoid the annoying, and possibly quite damaging, effects of memory errors PARITY MEMORY IS A MUST. On some computer systems the owner is willing to take some pain in order to save the $50 that parity memory adds in costs. If your computer will be used solely to play games or you don't mind occasionally having corrupt files or flaky programs then you may want to consider a system which has no memory error detection. Q) 2.23 How do I get a system with parity support? [From: gnewman@world.std.com (Gary Newman)] Once you've decided you want a computer that supports parity error detection, you will find that nearly all mainstream mail order systems are not available with it. Here are a few approaches that work. Buy a corporate or server system advertised with parity support. Dell Optiplex, HP Vectra, and others are available, but usually at a "corporate" priced premium of $600 or so. Buy from a local system builder who will provide parity support. Purchase a system with parity support but without parity SIMMs. All intel Neptune based P5 computers have such support. Then swap out the non-parity SIMMs after replacing them with parity simms you purchased from one of the many memory vendors. Then the non-parity SIMMs can be either sold to vendors who resell, or put in a game system you may have hanging around. Q) 2.24 How do you distinguish between parity and non-parity SIMMs? The precise method is to count the number and type of each chip (after looking them up in a databook for that DRAM manufacturer). However, you can get a good guess just by counting the number of chips. DRAMs (for PC SIMMs) are either 1 or 4 bits wide. The total bit width is 8 or 9 (for 30 pin SIMMs) and 32 or 36 (for 72 pin SIMMs). DRAMs to hold parity are usually 1 bit wide to allow byte writes. Some examples: 2 chips: 8 bit (2x4bit) - no parity 3 chips: 9 bit (2x4bit + 1x1bit) - parity 8 chips: 8 bit (8x1bit) or 32 bit (8x4bit) - no parity 9 chips: 9 bit (9x1bit) - parity 12 chips: 36 bit (8x4bit + 4x1bit) - parity Some new 72 pin SIMMs have two 32 (or 36) bit banks per SIMM and therefore have double the number of chips as a normal SIMM. It also seems that some cheap SIMMs have begun using 'fake' parity on SIMMs; XOR gates that generate parity from 8 bit data rather than store and recall the actual parity generated by the DRAM controller. The only way to tell if you've been taken by one of these fake parity SIMMs is to look up all of the suspected parts in a DRAM databook. Q) 2.25 Can I use Mac or PS/2 SIMMs in my PC? Yes, just about all SIMMs are compatible, be they from another personal computer, a mainframe, or even a laser printer, though are a few some odd systems out there. There are three significant issues: speed, parity and number of pins (data width). Speed is obvious, check the rating, ie: 70ns, to make sure they meet the minimum requirements of your system. Parity either exists or doesn't exist and can be identified by an extra bit per byte, ie: 9 bits or 36 bits. If your system does not require parity, you can still use SIMMs with parity. If, however, your system does require parity, you can't use SIMMs without parity. For this case, many PC's have an option to disable the parity requirement via a jumper or BIOS setting; refer to your motherboard manual. The final issue is the number of pins on the SIMM; the two most common are 30 pins (8 or 9 bit SIMMs) and 72 pins (32 or 36 bit SIMMs); the second is physically larger thus the one can not be used in the other. A few motherboards have both types of sockets. Q) 2.26 What do wait states and burst rates in my BIOS mean? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] Modern motherboards are equipped with variable clocks and features for tuning board performance at each speed. The BIOS knows how to program the register bits which control these options. 1. Wait states may be adjustable to allow for slower DRAMs or cache RAMs. If you don't have a motherboard manual, or it doesn't say, then you will just have to experiment. 2. Sometimes a wait or two on a write is required with write-through cache. The programming allows for slower DRAMs. The extra wait state may cost you enough time that you would do better running at a slower clock rate where the wait state is not required. 3. Burst rates refer to the number of wait states inserted for each longword access in the cache fill cycle. Bob Nichols (rnichols@ihlpm.ih.att.com) adds: These numbers refer to the number of clock cycles for each access of a "burst mode" memory read. The fastest a 486 can access memory is 2 clock cycles for the first word and 1 cycle for each subsequent word, so "2-1-1-1" corresponds to "zero wait states." Anything else is slower. How fast you can go depends on the external clock speed of your CPU, the access time of your cache SRAMs, and the design of the cache controller. It can also be affected by the amount of cache equipped, since "x-1-1-1" is generally dependent on having 2 banks of cache SRAMs so that the accesses can be interleaved. With a 50MHz bus (486DX-50), few motherboards can manage "2-1-1-1" no matter how fast the SRAMs are. At 33MHz or less (486DX-33, 486DX2-66), many motherboards can achieve "2-1-1-1" if the cache SRAMs are fast enough and there are 2 banks equipped (cache sizes of 64KB or 256KB, typically). Q) 2.27 Cache terminology, what does it mean? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] Why cache improves performance ------------------------------ Today's microprocessors ("uPs") need a faster memory than can be made with economical DRAMs. So we provide a fast SRAM buffer between the DRAM and the uP. The most popular way to set it up is by constructing a "direct mapped cache," which is the only setup I'll describe here. Generic motherboard cache architecture -------------------------------------- The direct mapped cache has three big features: 1. a "data store" made with fast SRAMs, 2 a "tag store" made with even faster SRAMs, and 3. a comparator. The data store is the chunk of RAM you see in the motherboard price lists. It holds "blocks" or "lines" of data recently used by the CPU. Lines are almost always 16 bytes. The address feeding the cache is simply the least significant part of the address feeding main memory. Each memory location can be cached in only one location in the data store. There are two "policies" for managing the data store. Under the "write-back" (or "copy-back") policy, the master copy of the data is in cache, and main memory locations may be "stale" at times. Under "write-through", writes go immediately to main memory as well as to cache and memory is never "stale." The tag store mantains one "word" of information about each line of data in the data store. In a "write-back" or "copy-back" cache, the tag word contains two items: 1. the part of the main memory address that was *not* fed to the data store, and 2. a "dirty" bit. A write-through cache doesn't need a dirty bit. The tag store is addressed with the most significant address bits that are being fed to the data store. The tag is only concerned with the address bits that are used to select a line. With a 16 byte line, address bits 0 through 3 are irrelevant to the tag. An example: The motherboard has 32 MB main memory and 256 KB cache. To specify a byte in main memory, 25 bits of address are required: A0 through A24. To specify a byte in data store, 18 bits (A0 through A17) are required. Lines in cache are 16 bytes on 16 byte boundaries, so only A4 through A17 are required to specify a line. The tag word for this system would represent A18 through A24 (plus dirty bit). The tag store in this system would be addressed by A4 through A17, therefore the tag store would require 16 K tag words seven bits wide. The dirty bit is written at different times than the rest of the tag, so it might be housed separately, and this tag store might be built in three 16K x4 SRAMs. What happens when it runs ------------------------- Each motherboard memory cycle begins when the uP puts out a memory address. The data store begins fetching, and simultaneously the tag begins fetching. When the tag word is ready, the Comparator compares the tag word to the current address. If they match, a cache hit is declared and the uP reads or writes the data store location. If the hit is a write, the copy-back cache marks the line "dirty" by setting its dirty-bit in the line's tag word. The write-through motherboard simultaneously stores the write data in data store and begins a DRAM write cycle. The uP moves on. If the tag word doesn't match, what a bummer, it's a cache miss. If the line in cache is dirty, double bummer, the line must be copied back to main memory before anything else can happen. All 16 bytes are copied back, even if the hit was a one-byte write. This data transfer is called a "dirty write flush." On a read-miss, the motherboard has to copy a line from main memory to cache (and update the tag, the whole operation is called a "cache fill"), and the uP can stop waiting as soon as the bytes it wants go by. On a write-miss, the caches I've worked with ignore the event (that's an oversimplification) and the main memory performs a write cycle. I've heard of systems that fill on a write-miss, that is they replace the cache line whenever it misses, read or write, dirty or not. I've never seen such a system. Terms ----- The 486, the 68020, and their descendants have caches on chip. We call the on-chip cache "primary" and the cache on the motherboard "secondary." The 386 has no cache, therefore the cache on a 386 motherboard is "primary." I like to call the DRAM array "core" for brevity. Motherboard = "mb." Megabyte = "MB." Problems -------- I added "core" and I had to disable my secondary cache to get the board running. Or, I added core and performance took a dive. Disabling secondary cache improved it, but still real slow. What happened? Whenever you are adding memory and you cross a power-of-2 address boundary, another address bit becomes interesting to the tag. That is, the tag does not care when you add your 8th MB (MB) but it cares a lot about the new address bit 24 when you add your 9th MB, or your 17th (bit 25). Evidently, at the low-price end of the mb market there are boards with not enough tag RAM sockets to support all the core they can hold. Most of these EL CHEAPO mbs don't even try to use cache in the region beyond the tag's coverage. Some of them don't have the logic to stay out or the BIOS doesn't know to enable it. These boards just don't run right. Do not buy a mb if you are not sure it can cache all of core. The worst case is with core fully stuffed with whatever the board claims to hold, and the smallest cache configuration. Some motherboards ask you to add cache when you add core, so that they don't have to provide for that worst case tag width. These motherboards may ask you to move some jumpers in the tag area. The jumpers control which address bits the tag looks at. Do not buy a motherboard if you don't know how to set all the jumpers. Q) 2.28 How do I upgrade the size of my cache? Look in your motherboard manual. Each motherboard is different. You will have to add or replace cache RAMs and move jumpers. Q) 2.29 Do I need to fill the "dirty tag" RAM socket on my motherboard? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] Perhaps you don't *have* to for the board to run, but the missing RAM will cost you performance. Most "write-back" mbs cope with the missing RAM by treating all lines as dirty. You get a lot of unneccessary write cycles; you might even do better with write-through. Your bargain-basement no-documentation no-brand mb might not have the pullup resistor on that socket, and it might run for a second, ten minutes, or ten years with that pin not driven. I think it's a pointless risk to leave the socket empty. Q) 2.30 How fast do my cache RAMs have to be? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] Only the person who designed your mb knows for sure. There is no simple formula related to clock rate. However, most people tell me their 33 MHz mbs' manuals call for 25 ns data store and 20 ns tag store, and their 40 and 50 MHz mbs want 20 ns data store and 15 or 12 ns tag. Tqhe tag has to be faster than data store to make time for the comparator to work. Do not buy a motherboard if you do not know what speed and size of cache RAMs it requires in all its speeds and configurations. If you're not sure, it doesn't hurt to use faster RAMs than your manual calls for. If your manual says 20 ns for location x and you happen to have 15 ns parts, it's ok to "mix" the speeds. It's ok to "mix" RAMs from more than one manufacturer. However, the faster RAMs will not buy you more performance. Q) 2.31 Which is the best cache policy, write-through or "write-back?" [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] For most applications, copy-back gives better performance than write-through. The amount of win will depend on your application and may not be significant. Write-through is simpler, but not by much any more. Q) 2.32 What about an n-way set associative cache, isn't it better? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] At the high end of the mb market, caches are available with more than one set. In these caches, the data store is broken into two or four parts, or sets, with a separate tag for each. On a miss, clever algorithms (such as Least Recently Used) can be used to pick which set will be filled, because each set has a candidate location. The result is a higher hit rate than a direct mapped (single set) cache the same size can offer. The primary cache on the 486 is four-way set associative. Q) 2.33 Which is better, ISA/EISA/VLB/PCI/etc? [From: ralf@alum.wpi.edu (Ralph Valentino)] Here is a quick overview of the various bus architectures available for the PC and some of the strengths and weaknesses of each. Some terms are described in more detail at the bottom. XT bus: 8 data bits, 20 address bits 4.77 MHz Comments: Obsolete, very similar to ISA bus, many XT cards will work in ISA slots. ISA bus: Industry Standard Architecture bus (aka. AT bus) 8/16 data bits, 24 address bits (16Meg addressable) 8-8.33MHz, asynchronous 5.55M/s burst bus master support edge triggered TTL interrupts (IRQs) - no sharing low cost Comments: ideal for low to mid bandwidth cards, though lack of IRQs can quickly become annoying. MCA bus: Micro Channel Architecture bus 16/32 data bit, 32 address bits 80M/s burst, synchronous full bus master capability good bus arbitration auto configurable IBM proprietary (not ISA/EISA/VLB compatible) Comments: Since MCA was proprietary, EISA was formed to compete with it. EISA gained much more acceptance; MCA is all but dead. EISA bus: Enhanced Industry Standard Architecture bus 32 data bits, 32 address bits 8-8.33MHz, synchronous 32M/s burst (sustained) full bus master capability good bus arbitration auto configurable sharable IRQs, DMA channels backward compatible with ISA some acceptance outside of the PC architecture high cost Comments: EISA is great for high bandwidth bus mastering cards such as SCSI host adaptors, but its high cost limits its usefulness for other types of cards. P-EISA: Pragmatic EISA (also Super-ISA) (see the description of the HiNT chipset elsewhere in this FAQ) VLB: VESA Local Bus 32 data bits, 32 address bits 25-40MHz, asynchronous 130M/s burst (sustained is closer to 32M/s) bus master capability will coexist with ISA/EISA slot limited to 2 or 3 cards typical backward compatible with ISA moderate cost Comments: VLB is great for video cards, but its lack of a good bus arbiter limits its usefulness for bus mastering cards and its moderate cost limits its usefulness for low to mid bandwidth cards. Since it can coexist with EISA/ISA, a combination of all three types of cards usually works best. PCI: Peripheral Component Interconnect local bus 32 data bits (64 bit option), 32 address bits (64 bit option) up to 33MHz, synchronous (upto 66MHz PCI 2.1 option) 132M/s burst at 33MHz (sustained) (264M/s with 64 bit option) full bus master capability good bus arbitration slot limited to 3 or 4 cards typical auto configurable will coexist with ISA/EISA/MCA as well as another PCI bus strong acceptance outside of the PC architecture support for 5V and 3.3V peripheral cards moderate cost Comments: The newest of the buses, combining the speed of VLB with the advanced arbitration of EISA. Great for both video cards and bus mastering SCSI/network cards. Notes: 64 bit option was defined in the original PCI 2.0 spec. 66MHz operation is an option of the PCI 2.1 spec and is only available for the 3.3V PCI bus. PCI 2.1 compliance does NOT imply 66MHz operation. =Terms= Auto configurable: Allows software to identify the board's requirements and resolve any potential resource conflicts (IRQ/DMA/address/BIOS/etc). Bus master support: Capable of First Party DMA transfers. Full bus master capability: Can support any First Party cycle from any device, including another CPU. Good bus arbitration: Fair bus access during conflicts, no need to back off unless another device needs the bus. This prevents CPU starvation while allowing a single device to use 100% of the available bandwidth. Other buses let a card hold the bus until it decides to release it and attempts to prevent starvation by having an active card voluntarily release the bus periodically ("bus on time") and remain off the bus for a period of time ("bus off time") to give other devices, including the CPU, a chance even if they don't want it. 16Meg addressable: This limits first party DMA transfers to the lower 16 Meg of address space. There are various software methods to overcome this problem when more than 16 Megs of main memory are available. This has no effect on the ability of the processor to reach all of main memory. Backward compatible with ISA: Allows you to place an ISA card in the slot of a more advanced bus. Note, however, that the ISA card does not get any benefit from being in an advanced slot, instead, the slot reverts to an ISA slot. Other slots are unaffected. Q) 2.34 *What are the (dis)advantages of ISA/VLB/EISA SCSI? Q) 2.35 Will an ISA card work in an MCA (PS/2) machine? No, they will not. MCA, unlike EISA and VLB, is not backward compatible with ISA. Q) 2.36 What does the "chip set" do? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] The motherboard "chip set" contains all the logic that's not in the microprocessor ("uP") and its coprocessor, or the memory. These functions always include: * Address decoding and "memory mapping" * keyboard interface controller (which includes reset generator) * Direct Memory Access (DMA) channels * interrupt controller * bus controller(s) * battery-powered "real time" clock/calendar circuit * crystal-controlled clock oscillator(s) * main memory controller They almost always include: * controller for cache external to the uP * "turbo" switch logic * programmable "wait state" logic and some of them include: * controller(s) for PCMCIA slots * "green" power-conservation logic * video display logic for CRT, LCD, or both * serial ports, parallel ports, floppy, SCSI and/or IDE, etc. controllers * network interface controllers (for Ethernet) Some people consider the BIOS ROM part of the "chip set." Sometimes part of an EISA or VLB bus controller is implemented in an optional, socketed integrated circuit. A motherboard like that can be sold with the socket empty, and you have to go back and buy the "bus mastering option" later when you find out you need it. "Chip sets" are usually a set of highly integrated, special purpose integrated circuits. The keyboard interface controller is usually in a 40-pin dual-inline pin (DIP) package compatible with the Intel 8048 single-chip microcomputer which was used for that function in the IBMPC-AT. The rest of the logic often fits in a single IC. In the trade, you may see this single IC referred to as "the chipset," even though the keyboard interface and other logic is external. The Asian data sheets often call the high-integration chips "LSIs." The word "ChipSet" is a trademark of Chips and Technologies Inc. (San Jose, California), which introduced a 5-chip set of LSIs for AT-clone motherboards in early 1985. CTI may also own "chipset" and "Chipset"; I don't know. CTI was very successful at promoting the term "ChipSet," but less successful at associating it in the public mind with their particular brand. People use the word to refer to any high integration chip used in PCs. For example, you'll hear people talk about the "ET4000 video chipset." The ET4000 is a single chip which integrates most of an SVGA controller. The word "ASIC" (application-specific integrated circuit) would be more appropriate. Single, high-integration ICs are not very good at driving heavily loaded signals, like the ones in the memory array and the expansion slots. Better motherboards use buffer chips external to the LSI for this electrical function. It may not show up in "WinMark" comparisons, but it shows in electrical compatibility. Well-buffered motherboards are less likely to require SIMM "cherry-picking," and are more likely to work at high ambient temperatures. The 74F245, which costs about 15 cents in high volume, is often used for this electrical buffering. Q) 2.37 How do I enter the CMOS configuration menu? [From: burnesa@cat.com (Shaun Burnet)] AMI BIOS Del key during the POST Award BIOS Ctrl-Alt-Esc DTK BIOS Esc key during the POST IBM PS/2 BIOS Ctrl-Alt-Ins after Ctrl-Alt-Del Phoenix BIOS Ctrl-Alt-Esc or Ctrl-Alt-S [From: mike@pencom.com (Mike Heath)] Some 286 machines don't have a CMOS configuration menu in the BIOS. They require a software CMOS setup program. If you don't have the Installation and/or Diagnostics diskette for your machine, you can try using a shareware/freeware program. Try looking in: oak.oakland.edu:/SimTel/msdos/at or ftp.uu.net:/systems/msdos/simtel/at Q) 2.38 What is bus mastering and how do I know if I have it? Bus mastering is the ability of an expansion (ISA/EISA/VLB/MCA/etc) card to directly read and write to main memory. This allows the CPU do delegate I/O work out to the cards, freeing it to do other things. For all of the above busses, bus mastering capability is assumed. Unless specifically stated otherwise (labeled "SLAVE" for instance), you should assume each slot has this capability. For cards, this is not assumed. If you want a bus mastering card, you should specifically request it and expect to pay more. Note that some cards (RLL/MFM/IDE/com) are not available in bus mastering versions. A bus mastering card will only work in a slot that supports bus mastering. If placed in a non-bus mastering slot, it will fail immediately. A non-bus mastering card will work identically in either type of slot. Q) 2.39 Can I put an ISA cards in EISA or VLB slots? Yes, you can put ISA cards in both EISA slots and VLB slots, as both buses were specifically designed to be 100% ISA compatible. ISA cards will not directly effect the performance of EISA/VLB cards; a well balanced system will have both. Note, however, that the total bandwidth of the bus will be split between all cards, so there is a strong advantage to using EISA/VLB cards for the high bandwidth devices (disk/video). Q) 2.40 How should I configure ISA/VLB cards in the EISA config utility? Only EISA cards matter in the ECU; ISA and VLB entries are only place markers. While this is a good way to keep track of IRQ, DMA and BIOS conflictions, ISA and VLB need not be placed in the configuration at all, nor should it be assumed that the settings for them match the actual card settings. If you wish to add them, you can use the "Generic ISA Card" configuration file for either. Do not expect card vendors to supply them. Q) 2.41 What is the difference between EISA Standard and Enhanced modes? Many EISA cards support both Standard (ISA) and Enhanced (EISA) modes. In Standard mode, the card will appear to be an ISA card to the OS; it will generate edge triggered interrupts and only accept ISA addressing (for bus mastering cards), for instance. An important thing to note is that the card may still do EISA specific things like 32-bit data bus mastering and EISA configuration setup as this functionality is hidden from the OS. Q) 2.42 Is there any point in putting more than 16M in an ISA machine? [From: cls@truffula.sj.ca.us (Cameron L. Spitzer)] Sure. Even inferior operating systems can use it for something. The question is how much performance it buys. In ISA, the DMA channels and bus-mastering IO cards can only address the first 16 MB. Therefore the device drivers have to copy data up and down or just not use the space. I am told the Linux SCSI drivers know how to do this. I don't know about OS/2 or MSWindows. Q) 2.43 What disadvantages are there to the HiNT EISA chip set? [From: ralf@alum.wpi.edu (Ralph Valentino)] The HiNT Caesar Chip Set (CS8001 & CS8002) can come in three different configurations. All three of these configurations have EISA style connectors and are (sometimes incorrectly) sold as EISA motherboards. The differences should be carefully noted, though. The rarest of these configuration uses a combination of the first HiNT chip (CS8001) and the Intel chip set. This configuration can support the full EISA functionality: 32 address bits, 32 data bits, level sensitive (sharable) interrupts, full EISA DMA, watch dog (sanity) timer, and so forth. The second configuration is called Super-ISA, which uses both of the HiNT chips. This configuration is very common in low-end models. It supports a very limited functionality: 24 address bits, 32 data bits, edge triggered (non-sharable) interrupts, ISA (16 data, 24 address) DMA, and no watch dog timer. Some EISA boards, such as the Adaptec 1742A EISA Fast SCSI-2 host adapter, can be configured to work in this mode by hacking their EISA configuration file (.CFG) to turn off these features. Other EISA cards require these features and are therefore unusable in these systems. The final configuration is called Pragmatic EISA, or P-EISA. Like Super-ISA, both HiNT chips are used but external support logic (buffers and such) are added to provide a somewhat increased functionality: 32 address bits, 32 data bits, edge triggered (non-sharable) interrupts, ISA (16 data, 24 address) DMA, and no watch dog timer. The full 32 bits for address and data allow bus mastering devices access to the complete range of main memory. As with Super-ISA, there may be incompatibilities with some EISA cards. Q) 2.44 *Should I change the ISA bus speed? Q) 2.45 Why is my PC's clock so inaccurate? [From: rbean@execpc.com (Ron Bean)] Well, you're not alone-- expensive workstations come with inaccurate clocks too! Usually they just run at the wrong speed, which means you can compensate with software that measures the drift rate and applies a correction factor. In the long run, this can be *very* accurate. Other programs can periodically set your clock to match another one that's known to be accurate (see the question on setting your clock). If your clock is more erratic (eg, it stops when the machine is turned off, or the date gets scrambled), try replacing the battery (but remember to write down your CMOS settings first!). The CMOS RAM takes considerably less power than the clock, so it may keep working even though the battery is too weak to run the clock (see the question on replacing the battery for details). The interrupt-based "DOS time" can also be affected by programs that disable interrupts for too long, so if you don't reboot your machine for a couple of days (and don't do anything else that resets the system time to match the CMOS clock) you may find that it has drifted also. A typical cheap quartz watch is rated at +/- 15 sec per month (3 minutes per year) which is about 5.7 ppm (parts per million). In practice they are often much more accurate than that. Dallas Semiconductor rates their encapsulated clock modules for +/- 1 min per month, or 22.8 ppm. Many motherboards are off by 100 ppm. To some extent this is because the manufacturer can't predict the operating temperature, which affects the crystal's frequency-- some machines run warmer than others, and some run more hours per day than others. The crystal's frequency will also change slightly over time as the crystal "ages". Clocks with external crystals can be "fine-tuned" with a trimmer capacitor, although I've never heard of anyone actually doing this on a motherboard. The original IBM AT used the Motorola MC146818, which is a real-time clock plus 50 bytes of CMOS RAM. This chip is discussed in the book "The Undocumented PC", from Addison-Welsey. The Dallas Semiconductor DS1285 is a drop-in replacement for the MC146818, and the DS1287 is the same chip encapsulated with its own battery and clock crystal. Other variants include larger amounts of CMOS RAM. Q) 2.46 How can I automatically set my PC's clock to the correct time? [From: rbean@execpc.com (Ron Bean)] A good place to start is http://www.eecis.udel.edu/~ntp/ which includes a lot of interesting time-related stuff for several operating systems, including ways to set your clock from time servers on the internet, or from dial-up modem services (long distance rates apply). Some will automatically reset your clock every time you connect to the internet. If you just want an accurate voice announcement, you can hear WWV by dialing (303)499-7111. An alternative approach is to calculate how fast your clock drifts away from the correct time, and apply a correction factor. This method was popular before internet access was widely available, but has apparently been abandoned in recent years, even though it can be highly accurate. I haven't found a Windows program that uses this method, but the DOS versions will run in a DOS window under Win95. These programs can be useful for machines that don't connect to the internet very often, but they can't be used with other clock-setting programs, because they need to keep track of exactly when the clock was reset. One free version is ADCLK100.ZIP, or several shareware versions can be found at the URL above. Linux comes with a program called Clock(8) that takes this approach, although some people prefer to use the xntpd package instead. Type 'man 8 clock' for more information, or see the appropriate mini-HOWTO. Note: if you're running more than one OS on the same machine (such as Windows & Linux) you should only let one of them reset the CMOS clock, including the change to and from Daylight Savings Time. GPS signals include time information, and some GPS receivers have a data connector. This may become the low-cost solution in the near future, as cheaper GPS receivers become available. For information on one version (designed by a Ham Radio club), see http://www.tapr.org/tapr/html/tac2.html Several countries broadcast time signals by shortwave radio. Most radio clocks that will connect to a serial port cost $3-4000, but there are plans for an inexpensive "gadget box" (actually a 300 baud modem) that sits between your computer and any shortwave radio tuned to Canada's CHU on 3.33, 7.335, or 14.670 MHz (see ftp://ftp.udel.edu/pub/ntp/gadget.tar.Z). If you're running some version of unix or NT, the xntpd package includes drivers for most radio clocks. In Germany, the Physikalisch-Technische Bundesanstalt (PTB) broadcasts a coded time signal on 77.5 kHz from a transmitter near Frankfurt, and inexpensive receivers are available that can plug into a serial port. In the US, NIST runs a similar station (WWVB) on 60 kHz, but the data is encoded differently and receivers are expensive and hard to find. You may have heard about Heathkit's "Most Accurate Clock", which decodes the time signal from WWV and has a serial port. Heath no longer sells kits, but they still sell the factory-built version of the clock (cost is in the $4-500 range). Their address is P.O. Box 1288, Benton Harbor, MI 49023. NIST publishes a 30-page booklet (NIST Special Publication 432) that explains all of their time services in detail, including WWV, WWVB, and the GOES satellite service. It can be obtained from the Government Printing Office or directly from: NIST/Radio Station WWV 2000 East County Road 58 Fort Collins, CO 80524-9499 Of course, many people don't care what time it is anyway. But if your machine is on a network it can sometimes cause problems if it's too far out of sync from it's neighbors. Q) 2.47 What is the battery for and how do I replace it? [From: rbean@execpc.com (Ron Bean)] The battery maintains power to the CMOS RAM and the real-time clock when your PC is turned off. You may have a small lithium "coin" battery soldered to the motherboard, or a larger external one plugged into a connector. Some motherboards have a jumper to select either type, and a few have a NiCd battery that recharges automatically, or a lithium battery encapsulated in the clock chip. NOTE: Always write down your CMOS settings before you mess with the battery! In fact, you should write them down now anyway, in case the battery fails later. The batteries that are soldered in or encapsulated with the clock chip are supposed to last 10 years or more, but your mileage may vary. Some people find that the external type has to be replaced every couple of years. Self-recharging NiCds that get power from a disk drive cable are available as aftermarket items. A few people have tried to save money by substituting 4 alkaline AA batteries for the expensive external lithium battery, but they have to be replaced more often. If you need to replace a soldered-in battery, have a repair shop install a socket (you shouldn't attempt this yourself, unless you're experienced at soldering on expensive multi-layer circuit boards). If the battery is encapsulated in the chip, there is no way to replace it without replacing the chip-- again, consult a repair shop if it's not socketed. These chips can be "turned off" via software to extend battery life during storage, and are shipped from the factory that way. Q) 2.48 Can I use IRQ2 or is it special? IRQ2 is used to cascade the second programmable interrupt controller (PIC) on AT machines. The IRQ2 line on the old XT bus has been renamed to IRQ9. This has one and only one side effect: from a software point of view, IRQ2 = IRQ9. You can freely use IRQ2 on any hardware device, provided you are not already using IRQ9. Your associated software driver can be set to IRQ2 or IRQ9, which ever it happens to prefer. Note that many video cards have an IRQ2 enable jumper for very, very old backward compatibility reasons; you should disable this before attempting to use the IRQ for something else. There are no unexpected side effects. Q) 2.49 Where do all the IRQ's and DMA Channels go? [From: wlim@lehman.com (Willie Lim)] [From: r.j.mersel@is.twi.tudelft.nl (Rob Mersel)] (Note that DRQ is the DMA Channel) Default IRQ/DRQ settings AT systems: IRQ IO BASE DRQ Card or Device ADDRESS (HEX) === ======= === ================ * * 0 unassigned (? bit DMA) * * 1 unassigned (8 bit DMA) * * 3 unassigned (8 bit DMA) * * 5 unassigned (16 bit DMA) * * 6 unassigned (16 bit DMA) * * 7 unassigned (16 bit DMA) 0 * * timer (reserved) 1 * * keyboard (reserved) 2 * * interrupt 8-15 (cascade) (see Q 2.40) 3 2E8-2EF * COM4: 3 2F8-2FF * COM2: 4 3E8-3EF * COM3: 4 3F8-3FF * COM1: 5 278-27F * LPT2: 6 3F0-3F7 2 Floppy drive controller 7 378-37F * LPT1: (PRN:) 8 * * real-time clock (reserved) 9 * * unassigned (see Q 2.40) 10 * * unassigned 11 * * unassigned 12 * * unassigned 13 * * math co-processor 14 1F0-1F7 * Hard drive controller (drive 0) 14 3F6-3F7 * Hard drive controller (drive 1) 15 170-177 * Secondary hard drive controller (drive 2) 15 376-377 * Secondary hard drive controller (drive 3) Adapter card IRQ/DRQ settings: IRQ IO BASE DRQ Card or Device ADDRESS (HEX) === ======= === ================ * 200-207 * Game port 2 330 * MPU-401 Emulation (PAS 16) 3 300 * 3Com Etherlink II, II/TP, II/16, II/16TP, 16/16TP 3 300 * Novell NE2000 3 300 * SMC/Western Digital 8003EP, 8013EWC, 8013WB 5 368 * Ungermann-Bass Ethernet NIUpc (long), NIUpc/EOTP (short) 5 ??? * DEC etherWORKS LC, Turbo, Turbo/TP 5 220 1 Sound Blaster Emulation (PAS 16) 5 220-22F 1 Sound Blaster 2.0 (default) * 338-339 * Sound Blaster 2.0 FM music chip 5 A20 5 Proteon P1390 7 * 3 Pro Audio Spectrum 16 (PAS 16) 9 300 5 Boca Ethernet BEN100, BEN102, BEN300 Default IRQ/DRQ settings XT systems: IRQ IO BASE DRQ Card or Device ADDRESS (HEX) === ======= === =============== * * 0 DRAM-refresh (used on motherboard only?) * * 1 unassigned 0 * * timer (reserved) 1 * * keyboard (reserved) 2 * * unassigned 3 2E8-2EF * COM4: 3 2F8-2FF * COM2: 4 3E8-3EF * COM3: 4 3F8-3FF * COM1: 5 ? 3 Hard drive controller 6 3F0-3F7 2 Floppy drive controller 7 378-37F * LPT1: (PRN:) S) 3.0 IO controllers/interfaces Q) 3.1 *How do IDE/MFM/RLL/ESDI/SCSI interfaces work? Q) 3.2 How can I tell if I have MFM/RLL/ESDI/IDE/SCSI? [From: ralf@wpi.edu (Ralph Valentino)] The most reliable way to tell what type of drive you have is to call the manufacturer with the model number and ask. There is an extensive list of phone numbers in the References section of the FAQ. That aside, the first thing to check is the number of pins on the drive's connector(s). The second thing to check is the CMOS setup, assuming, of course, that it is in a working system. SCSI = 1 cable: 50 pins (note 1,2) usually set up as "not installed" in the CMOS IDE = 1 cable: 40 pins no reliable way to tell from the CMOS RLL = 2 cables: 34 pins & 20 pins always has 26 sectors per track MFM = 2 cables: 34 pins & 20 pins always has 17 sectors per track (note 3) ESDI = 2 cables: 34 pins & 20 pins (note 4) usually set up as type #1 in the CMOS and auto-configured at boot time If you've narrowed it down to RLL/MFM or ESDI but it isn't in a working system, there's no easy way to narrow it down any further just by looking at the drive. note 1: The QIC-2 tape drive interface also has 50 pins note 2: To differentiate single ended and differential SCSI, see the scsi-faq note 3: Some people attempt to set up MFM drives as RLL with varying success, this method will only tell you what it is set up as. note 4: While ESDI uses the same type of cables as RLL and MFM, the signals are very different - do not connect ESDI to RLL or MFM! Q) 3.3 Do caching controllers really help? [From: backbone!wayne@tower.tssi.com (Wayne Schlitt)] The short answer, is that if you are using a multi-tasking operating system with a good memory manager, caching controllers should be ignored. If you are running DOS or Windows, then *maybe* they will help, but I am not sure that they are a good buy. There are lots of people who have said "I put a caching controller in my computer, and it runs faster!". This is probably true, but they never have measured the speed increase compared to putting the same memory into main memory instead. More importantly, the caching controllers cost more money than non caching controllers, so you should be able to add _more_ main memory instead of buying a caching controller. The following is a shortened up version of a much longer article. If you want a copy of the longer article, send me email at "wayne@cse.unl.edu". *** Why a multi-tasking operating system? A multi-tasking operating system can allow the application to continue immediately after it does a write, and the actual disk write can happen later. This is known as write behind. The operating system can also read several blocks from the file when the application requests just part of the first block. This is known as read ahead. When the application requests the block later on, the block will already be there and the OS can then schedule some more reads. A multitasking operating system is required because these operations can cause interrupts and processing when control has been given back to the application. Basically, operating systems such as DOS, MS-Windows, MacOS and such do not allow true preemptive multitasking and can not do the read a heads and the write behinds. For these systems, the latency of a disk drive is the most important thing. The application does not regain control until the read or write has finished. *** The controller can't speed up the disk. Remember, the bottleneck is at the disk. Nothing that the controller can do can make the data come off the platters any faster. All but the oldest and slowest controllers can keep up with all but the newest and fastest disks. The SCSI bus is designed to be able to keep *several* disks busy without slowing things down. Speeding up parts of the system that are not the bottleneck won't help much. The goal has to be to reduce the number of real disk accesses. *** First, isn't the caching controller hardware and isn't hardware *** always faster than software? Well, yes there is a piece of physical hardware that is called the caching controller, but no, the cache is not really "in hardware". Managing a disk is a fairly complicated task, complicated enough that you really can't implement the controller in combinatorial logic. So, just about all disk controllers and for that matter all disk drives have a general purpose computer on them. They run a little software program that manages the communication between the main cpu and the disk bus, or the disk bus and the disk. Often this cpu is put in with a bunch of other logic as part of a standard cell custom chip, so you might not see a chip that says "Z80" or such. So, we are really not comparing "hardware" with "software", we are comparing "software on the controller" with "software on the main cpu". *** Ok, why can the OS win? Assume that you have a bunch of memory that you can either put into main memory and have the OS manage the cache, or put on a caching controller. Which one will be better? Let us look at the various cases. For a cache hit you have: If the OS does the caching, you just have the OS's cache checking latency. If the card does the caching, you will have the OS's cache checking latency, plus the I/O setup time, plus the controller's cache checking latency, plus you have to move the data from the card to main memory. If the controller does DMA, it will be taking away from the memory bandwidth that the main CPU needs. If the controller doesn't have DMA, then the main CPU will have to do all the transfers, one word at a time. For a cache miss, you have: If the OS does the caching, you have the OS's cache checking latency plus the set up time for the disk I/O, plus the time it takes for the disk to transfer the data (this will be a majority of the time), plus the cost of doing either the DMA or having the CPU move the data into main memory. The caching controller will have all of the above times, plus it's own cache checking latency. As you can see, the caching controller adds a lot of overhead no matter what. This overhead can only be offset when you get a cache hit, but since you have the same amount of memory on the controller and the main cpu, you should have the same number of cache hits in either case. Therefore, the caching controller will always give more overhead than an OS managed cache. *** Yeah, but there is this processor on the controller doing the *** cache checks, so you really have a multi-processor system. *** Shouldn't this be faster than a single processor? Doesn't this *** allow the main cpu to do other things while the controller manages *** the cache? Yes, this really is a multi-processor system, but multi-processors are not always faster than uni-processors. In particular, multi-processor systems have communication overhead. In this case, you are communicating with the controller using a protocol that is fairly expensive, with outb instructions and interrupts and such. The overhead of communicating with this other processor is greater than the overhead of just checking the cache on main cpu, even if the main cpu is very slow. The multi-processor aspect just doesn't help out when you are talking about managing a cache. There is just too much communication overhead and too little processing for it to be a win. *** Ok, but couldn't the caching controller do a better job of *** managing the cache? Both the controller and the OS are going to be executing a piece of software, so in theory there isn't anything that the slower cpu on the controller can do that the OS can't do, but the OS can do things that the controller can't do. Here are some of the things that the OS can do better: * When you read a block from a file, the OS can read several more blocks ahead of time. Caching controllers often will read an entire track in order to simulate this file read a head, but the rest of the file isn't always on the same track, only the OS knows where the blocks are really going to be at. This can lead to wasted time and cache memory reading data that will never be used. * In order to improve file system reliability, some writes _must_ complete immediately, and _must_ complete in the order that they are given. Otherwise, the file system structures may not be left in a coherent state if the system crashes. Other writes can be completed as time is available, and can be done in any order. The operating system knows the difference between these cases and can do the writes appropriately. Caching controllers, on the other hand, don't know if the write that it was just given _must_ be written right away, or if it can wait a little bit. If it waits when it shouldn't, you are risking your file system and data. * Sometimes, you want a large disk cache if you are accessing lots of data off the disk. At other times, you want a small disk cache and more memory left to programs. The operating system can balance these needs dynamically and adjust the amount of disk cache automatically. If you put the memory on a caching controller, then that memory can _only_ be used for disk caches, and you can _never_ use more. Chances are, you will either have too much or too little memory dedicated to the cache at any give time. * When a process closes a file, the operating system knows that the blocks associated with that file are not as likely to to be used again as those blocks associated with files that are still open. Only the operating system is going to know when files are closed, the controller won't. Similar things happen with processes. * In the area of Virtual Memory, the OS does an extremely better job of managing things. When a program accesses a piece of memory, the CPU will do a hardware level check to see if the page is in memory. If the page is in memory, then there will basically be no delay. It is only when the page isn't in memory that the OS gets involved. Even if all of those extra pages are sitting in the caching controller's memory, they still have to be moved to main memory with all the overhead that that involves. This is why dynamic caches vs program memory is so important. *** What is the "Memory Hierarchy" and how does this relate to *** caching controllers? The basic idea of a memory hierarchy is to layer various types of memory, so that the fastest memory is closest to the cpu. Faster memory is more expensive, so you can't use only the fastest type and still be cheap. If a piece of data isn't in the highest (fastest) level of the hierarchy, then you have to check the next level down. In order for a memory hierarchy to work well, you need to make sure that the each level of the hierarchy has much more storage then the level above it, otherwise you wont have a high hit rate. The hierarchy on a 486 goes something like this: 8 regs << 8k on chip cache << 256k off chip cache << main memory << disk If you are going to put something between main memory and disk, it needs to be much larger than main memory in order for it to be effective. *** What about all these neat things that a caching controller can do *** such as elevator seeking, overlapping seeks with reads and writes, *** scatter/gather, etc... These are nice features, but they are all done by either the OS or a good SCSI controller anyway. None of these things are at all related to supporting the cache, so you shouldn't buy a caching controller for just these features. *** Ok, you have talked about things like Unix, OS/2 and Windows NT, *** but what about DOS and MS-Windows? Well, here things get a lot grayer. First, older versions of DOS have notoriously bad disk cache programs. Since neither DOS nor MS-Windows are preemptive multi-tasking systems, it is much harder to do read ahead. Also, since DOS/MS-Windows users are used to being able to power off their computers at any time, doing write behind is much more dangerous. DOS and MS-Windows also can crash much easier than these other OS's, so people might reboot for many reasons. Caching controllers usually leave the hard disk light on when they have data that hasn't been written out, and people don't usually power their computer off until that light goes out. This lets the controllers do write behind fairly safely. (But you can still loose power, so this isn't risk free.) They also do crude read a heads by prereading entire tracks. DOS also runs in real mode and real mode can only access 640K of memory. This mean that a disk cache can be real helpful. Unfortunately, to do a software based disk cache, the cpu has to be switched into protected mode in order to access memory beyond the 640K boundary and then you have to switch back into real mode. Intel, however forgot to make it easy to switch back to real mode. All in all, this switching back and forth ends up being real expensive. This _might_ be more expensive than just using a caching controller, I don't know. So, it is possible that if you configure DOS to not use a cache, and get a caching controller, then you might be a head. I really don't know much about this area. I have not done any real timings of this. *** So, when would you ever want to buy a caching controller? The answer is not too often, but there are a few cases that I can think of: * You have filled up all your SIMM slots on your motherboard and in order to add more memory you would have to throw some out. This is a real shaky reason. You can always sell your old memory, or move it to another computer. The jump from 4 1MB SIMMs to 4 4MB SIMMs is large, but you will be much better off in the long run with more main memory. * You have maxed out your memory and you need it all for programs and data. If you can't put any more memory on the mother board, then you don't have many choices. * If you have a bunch of slow (100ns-120ns) memory left over from say a 286 or something and you can't use it on your motherboard because it is too slow, then maybe adding it to a caching controller will help. Be careful however, if your hit rates on the caching controller are too low, then you may be just adding overhead without getting any benefits. * If you are stuck with a bad OS because that's what your applications run on, then you might be better off with a caching controller. *** What about those disk drives that come with caches, are they bad too? Don't confuse caching disk controllers with cache on disk drives. The latter is actually useful. The little cpu on the disk drive has to read every byte that comes off the disk in order to see when the sector that you are interested in has come under the heads and to do any error detection and correction. The disk also has to have buffers in case the bus is busy, and to sync up the speeds of the bus and the heads. Since all this data is going though the cpu on disk drive and you have to have a buffer anyway, just making the buffer larger and saving the entire track is an easy win. Saving a couple of the most frequent tracks is also a win. Most of these caches on the disk drives are fairly small (64k-256k), and a single memory chip will give you about that amount of memory anyway, so you aren't wasting many resources. This also allows the OS to always assume that interleaving is not necessary to get full disk throughput, even if it does a fair amount of processing between disk requests. Q) 3.4 Do IDE controllers use DMA? No, they do not. This is a rumor that keeps popping up. This may change on the next revision of the standard. Q) 3.5 Why won't my two IDE drives work together? [From: jruchak@mtmis1.mis.semi.harris.com (John Anthony Ruchak)] Assuming that the drives are attached to the same controller and they work properly when attached one-at-a-time, you probably don't have them configured properly for Master/Slave operation. When operating 2 IDE drives, one must be designated as "Master" and the other as "Slave." There are jumpers on every IDE drive to configure this. Check your hard drive manuals for the jumper settings for your drives. In general, it doesn't matter which is which - just pick one as master, and make the other slave. In your CMOS configuration, Drive 1 should have the parameters (heads, cylinders, etc.) that match the drive you set as "Master" and Drive 2's parameters should match those of the "slave" drive. In operation, the Master will appear as drive C: and the slave as drive D:. Because not all hard drive manufacturers follow the IDE specifications closely enough, drives from 2 different manufacturers may not work well together. In this case, changing master -> slave and slave -> master (along with the appropriate CMOS changes) may help. If it doesn't, then trying two drives from the SAME manufacturer is the only avenue you have left. Q) 3.6 Which is better, VLB or ISA IDE? [From: pieterh@sci.kun.nl] If a simple answer is what you want, then yes, in general VLB IDE controllers are better than ISA ones. If you are purchasing or putting together a computer, the relatively small price difference makes the choice for a VLB controller a sensible one. However, if you already have an ISA controller and are wondering whether it's worth upgrading to VLB, it's not that easy. VLB may be faster in principle, the question is if you're going to notice it. *** The Bottlenecks Let's take a look at what the limiting factors are in the path the data travels from your drive platter to the CPU. 1. Raw data transfer from the drive platter. To find out what this rate is, you need the spec sheet for your drive. Remember that it is dependent on the cylinder, so a single drive can give different results depending on where on the drive you're testing. Anyway, this transfer rate is 1 to 2 MB/s on most IDE drives, depending on data density and rotational speed. 2. The data has to be digested by the drive's onboard controller, which not only mediates between the drive hardware and the IDE bus, but also manages the buffer cache. Let's hope it's both fast and intelligent (not always the case *sigh*). 3. Data transfer over the IDE/ATA bus (2-3MB/s with standard timing). The actual speed depends on the timing used; some drives and controllers support faster timing. Enhanced IDE (IDE-2) can transfer up to 11 MB/s. 4. Transfer from the interface to the CPU (ISA: max 5 Mb/s, VLB: 10-80 MB/s depending on CPU clock, wait states, interface...) A generic IDE interface is usually not able to get the most out of the ISA and IDE bandwidths (3 and 4); a typical upper limit is about 2 MB/s if you use block transfers (see below), 2.5 MB/s if you're willing to push the ISA bus clock a little (more about that later on). Still, it's clear that on all but the fastest drives the raw data transfer rate to/from the drive platter (1) will determine the maximum performance you're going to get. If you're getting transfer rates near this limit, you can't significantly improve your throughput whatever you do. *** Tuning Your Harddisk Suppose your harddisk throughput is lower than you think is possible with your drive. How can you tune your system to improve hard disk performance? I'll go through points 1-4 again and indicate what you can do to widen up the bottlenecks a little. 1. Drive platter to head transfer. - Sorry, there's nothing you can do short of getting a new drive. 2. The drive controller. - Many modern drives understand "block transfer", also known as multi-sector I/O or read/write multiple. Although the newest BIOSes have this feature built in, most of us will have to use a driver. More about that at the end of this section. What is block transfer? Normally, for each sector the computer wants to read from or write to the drive, it has to issue a separate command. When you're transfering 2 MB/s, that means you're sending the drive 4,000 commands each second. Each command has to be issued by the CPU, transferred over the ISA and IDE buses, interpreted and acted upon by the drive's onboard controller. Every such command takes a little time. By using block transfer mode, it is possible to read or write more than one sector (usually 4 to 32) using a single command. This greatly cuts down command overhead, as you can imagine, and may very well have a dramatic effect on a badly performing system. In most cases, it will improve performance by 5-20%. Unfortunately some older drives have inferior support of this feature and actually slow down... or in exceptional cases even hose your data. 3. The IDE bus. - With most drives you can use faster IDE bus timing, but your interface has to support this. Modern IDE interface chips often have completely programmable timing; these can be exceptionally fast if the software supports this feature and, of course, if the drive can keep up. Some controllers use jumpers to configure timing. The last word in IDE bus bandwidth is of course the Enhanced IDE bus, which allows exceedingly fast transfers if both drives and interface support it. If you cannot use improved timing with a new VLB interface, the IDE bus will prove to be as much as a bottleneck as the ISA bus was. - Not all interfaces are created equal, some are better engineered. With the current VLB hype, there's bound to be a friend who has an old (ISA) interface gathering dust; try that one. 4. The ISA bus. - The official speed of the ISA bus is about 8 MHz, but most cards, especially modern ones, will work fine on 11 MHz or more (some will even take as much as 20 MHz). If you don't mind experimenting, it may be worthwhile to see if your ISA cards run reliably at a higher bus clock. This is especially interesting if your drive nears the 2MB/s mark. The BIOS setup has to support this, of course. *WARNING* Pushing the ISA bus clock beyond spec often works well, but there is always the risk that it DESTROYS YOUR DATA. Make a backup before attempting this and thoroughly verify correct operation before entrusting critical jobs to a "pushed" system. - Finally, if you need more than the 2.5-3 MB/s or so you can squeeze out of a good ISA controller, VLB is the way to go. Be aware that the controllers on the market are of variable quality; VLB alone isn't going to be enough if you need the highest performance. It has occurred that a VLB interface proved to be, all things equal, slower than the ISA one it replaced! Take special note of the drivers: they must be stable and support whatever software you intend to use (DOS, Windows 32-bit VxD, OS/2). Without a driver loaded, the VLB interface will perform no better than an ISA controller. A final word about block transfer drivers. VLB controllers are usually shipped with a TSR that, among other things, enables block transfers (usually designated "Turbo" mode)---this is often where most of the performance gain actually comes from. But block mode is equally possible using ISA based interfaces. Popular block transfer drivers are Drive Rocket and DiskQwik. You can get a crippled version of the latter from Simtel: pub/msdos/diskutil/dqwik110.zip If you're using Linux, you can use Mark Lord's IDE performance patches to enable block mode. In true multitasking operating systems, block transfers have the additional advantage of greatly reducing CPU load. Q) 3.7 How do I install a second controller? [From: strople@ug.cs.dal.ca (PAUL LESLIE STROPLE)] The following should solve about 95% (9.5?) of second controller problems, if only to tell you it can't be done! Generic Second Controller Installation: 1) Normally the MFM/IDE/RLL controller is set up as the primary, and the ESDI/SCSI as the secondary; One reason for this is because the ESDI/SCSI controller cards are usually more flexible in their set up and secondly this method seems to work (probably due to reason one). 2) Your primary controller is set up using all the normal defaults: - Floppy at primary address(3F0-3F7). - Hard disk enabled, at primary addresses (1F0-1F7), BIOS address C800 and interrupt 14. 3) Your secondary controller is set up as: - Floppy drives disabled - Hard disk controller enabled, secondary address(170- 177) and interrupt 15. - NOTE: onboard bios set to D400, or D800 can be used, if there is a conflict. 4) Computer BIOS Setup: - Any drive(s) on the primary controller (MFM/IDE), should be entered in the BIOS setup as usual. - You DO NOT enter the drive types for the hard disks on the secondary controller, even if there are only two drives in the entire system i.e., if one drive on each controller you only enter the drive type of the hard disk on the primary controller -- the 2nd drive type is left as not installed (0). Operating System: If you do the above steps you now have the hardware setup correctly; your only other problem may be with the operating system. Different OSs handle secondary controllers differently; as well, different controllers handles same OSs differently (scared yet?). For example: with DOS you may require a device driver (available from the manufacture or through third party companies, such as Ontrack Computer Systems -- more on Ontrack later). Some flavors of UNIX handle a mixture of controllers better than others (e.g., IA 5.4 had probs mixing ESDI and SCSI controllers under certain conditions). Procedure: You should verify that your secondary controller, and associated hard drives, are working properly (you can try this by installing it as the primary system -- removing existing system first!). Follow above steps 1 to 4, pray, and turn on system! If it still won't work you may need additional drivers. First check with the supplier or manufacture (I know, for example, a DTC ESDI controller comes with the DOS drivers included, and it works perfectly). I am not sure of operating systems supported by Ontrack Data Systems. I know that their DOS driver can assist secondary controllers, even allowing two IDEs to co-exist. Likewise, the drivers can also install virtually any drive, regardless of what is supported by the BIOS. BIG NOTE: The features required in a secondary controller are normally not found on a $30.00 IDE controller. The best thing to do it, if possible, is to get a guarantee from the supplier/manufacture that if it doesn't work (and they can't make it) then they will take it back. Ontrack supplies a complete range of hard disk products and services -- from driver software, data recovery services, to media and data conversions (including tape backups). The product I know them from is DiskManager. Disk Manager is a utility for hard disk management. It will allow you to setup and install virtually any hard disk, regardless of disk's layout and BIOS options available. Disk Manager (version greater than 5.2.X, or there abouts) includes a driver for co-resident controllers. For driver to work the co-res board must be able to hit the above addresses and must be WD1003 AT command set compatible (this includes most IDE and ESDI boards). DM contains a number of features, including full diagnostics. You may not need to know the disk's geometry, as there are numerous layouts stored internally. All you need to do is select the correct model and DM does the rest. To contact Ontrack: U.S. (800)-872-2599; UK 0800-24 39 96 this is either an address or phone number! outside U.K. (but NOT U.S.) 44-81-974 5522 Q) 3.8 >What is EIDE/Fast-ATA/ATA-2/ATAPI what advantages do they have? This topic is posted separately as the "Enhanced IDE/Fast-ATA/ATA-2 FAQ" and archived along side this FAQ. Refer to section one for instructions on retrieving this file. Newsgroups: comp.sys.ibm.pc.hardware.storage,comp.sys.ibm.pc.hardware.misc, comp.answers,news.answers Subject: Enhanced IDE/Fast-ATA/ATA-2 FAQ [* of *] From: pieterh@sci.kun.nl (Maintainer) Summary: This FAQ addresses issues surrounding Enhanced IDE, ATA-2, ATAPI and Enhanced BIOSes. It includes practical questions, background information and lists of net resources. Archive-name: pc-hardware-faq/enhanced-IDE Q) 3.9 Which is better, SCSI or IDE? [From: ralf@alum.wpi.edu (Ralph Valentino)] IDE vs SCSI Non-issues: 1) SCSI and IDE devices cost approximately the same for the same features (size, speed, access time). Shop around for good prices. Advantages of IDE: 1) faster response time (low request overhead) 2) hard drive interface is compatible with RLL/MFM/ESDI: any driver for one (including the main system BIOS) will run the other. 3) IDE controllers are considerably cheaper ($150 and up) than SCSI host adapters. 4) Will always be the boot device when mixed with SCSI. Advantages of SCSI: 1) Supports up to 7 devices per host adapter. This saves slots, IRQ's, DMA channels and, as you add devices, money. 2) Supports different types of devices simultaneously the same host adapter (hard drives, tape drives, CDROMs, scanners, etc). 3) SCSI devices will work in other systems as well (Mac, Sparc, and countless other workstations and mainframes). If you change platforms in the future, you will still be able to use your SCSI devices. 4) Automatically configures device type, geometry (size), speed and even manufacturer/model number(SCSI-2). No need to look up CMOS settings. 5) Busmastering DMA (available in all but a few cheap SCSI host adapters) decreases amount of CPU time required to do I/O, leaving more time to work on other tasks (in multitasking OS's only). 6) Software portability - drivers are written for the host adapter, not the specific device. That is, if you have a CDROM driver for your host adapter, you can purchase any brand or speed SCSI CDROM drive and it will work in your system. 7) Will coexist with any other type of controller (IDE/RLL/MFM/ESDI) or host adapter (other SCSI cards) without any special tricks. SCSI host adapters do not take up one of the two available hard drive controller port addresses. 8) greater bandwidth utilization (higher throughput) with multiple devices. Supports pending requests, which allows the system to overlap requests to multiple devices so that one device can be seeking while the second is returning data. 9) Ability to "share" devices between machines by connecting them to the same SCSI bus. (note: this is considerably more difficult to do than it sounds). 10) Bridges are available to hook RLL and ESDI drives to your SCSI host adapter. (note: these tend to be prohibitively expensive, though). Warnings: 1) With otherwise equal drives, IDE will perform better in DOS due to low command overhead. SCSI, however, will perform better in multitasking OS's (OS/2, Unix, NT, etc). If you see speed comparisons (benchmarks), make sure you know what OS they were run under. 2) Most benchmarks only test one aspect of your system at a time, not the effect various aspects have on each other. For instance, an IDE drive may get faster throughput but hurt CPU performance during the transfer, so your system may actually run slower. Similar confusions arise when comparing VLB and EISA host adapters. 3) When comparing two systems, keep in mind that CPU, memory, cache, and bus speed/type will all effect disk performance. If someone gets great I/O performance with a particular controller/drive combination on his Pentium, you should not expect your 386SX-25 to get such I/O performance even with the exact same controller/drive combination. 4) Similarly sized or even priced drives may not perform equally, even if they're made by the same manufacturer. If you're going to compare two drives, make sure they have the exact same model number. (IDE drives usually have an 'A' and SCSI drives usually have an 'S' appended to their model number). Q) 3.10 Can MFM/RLL/ESDI/IDE and SCSI coexist? The PC is limited to two drive controllers total. SCSI, however, is a "host adapter" and not a drive controller. To the rest of your system, it appears more like an ethernet card than a drive controller. For this reason, SCSI will always be able to coexist with any type drive controller. The main drawback here is that on most systems, you must boot off a disk on the primary drive controller, if you have one. That means if you have SCSI and IDE in your system, for example, you can not directly boot from the SCSI drive. There are various ways to get around this limitation, including the use of a boot manager. Q) 3.11 What's the difference between SCSI and SCSI-2? Are they compatible? The main difference between SCSI and SCSI-2 are some new minor features that the average person will never notice. Both run at a maximum 5M/s. (note: Fast and Wide SCSI-2 will potentially run at faster rates). All versions of SCSI will work together. On power up, the SCSI host adapter and each device (separately) determine the best command set the speed that each is capable of. For more information on this, refer to the comp.periphs.scsi FAQ. Q) 3.12 How am I suppose to terminate the SCSI bus? Some basic rules on termination: 1. The SCSI bus needs exactly two terminators, never more, never less. 2. Devices on the SCSI bus should form a single chain that can be traced from the device at one end to the device at the other. No 'T's are allowed; stub length should be kept as short as possible. 3. The device at each end of the (physical) SCSI bus must be terminated, all other devices must be unterminated. 4. All unused connectors must be placed _between_ the two terminated devices. 5. The host adapter (controller) is a SCSI device. 6. Host adapters may have both an internal and external connector; these are tied together internally and should be thought of as an "in" and "out" (though direction has no real meaning). If you have only internal or external devices, the host adapter is terminated otherwise it is not. 7. SCSI ID's are logical assignments and have nothing to do with where they go on the SCSI bus or if they should be terminated. 8. Just because your incorrectly terminated system happens to work now, don't count on it continuing to do so. Fix the termination. Examples: internal external internal external T------|-----|------T T------|-------|-----|------|------T drive drive HA cdrom tape unused unused HA drive drive internal external external T------|-----T T------|------T T------T drive drive HA HA tape cdrom HA cdrom "T" = terminator "|" = connector (no terminator) "HA" = Host Adapter Q) 3.13 Can I share SCSI devices between computers? There are two ways to share SCSI devices. The first is removing the device from one SCSI host adapter and placing it on a second. This will always work if the power is off and will usually work with the power on, but for it to be guaranteed to work with the power on, your host adapter must be able to support "hot swaps" - the ability to recover from any errors the removal/addition might cause on the SCSI bus. This ability is most common in RAID systems. The second way to share SCSI devices is by connecting two SCSI busses together. This is theoretically possible, but difficult in practice, especially when disk drives are on the same SCSI chain. There are a number of resource reservation issues which must be resolved in the OS, including disk caching. Don't expect it to 'just work'. Q) 3.14 What is Thermal Recalibration? When the temperature of the hard drive changes, the media expands slightly. In modern drives, the data is so densely packed that this expansion can actually become significant, and if it is not taken into account, data written when the drive is cold may not be able to be read when the drive is warm. To compensate for this, many drives now perform "Thermal Recalibration" every degree C (or so) as the drive warms up and then some longer periodic interval once the drive has reached normal operating temperature. When thermal recalibration takes place, the heads are moved and the drive may sound like you are accessing it. This is perfectly normal. If you're attempting to access the drive when thermal recalibration occurs, you may experience a slight delay. The only time this becomes important is when you're doing real-time operations like recording / playing sound or video. Proper software buffering of the data should be able to hide this from the application, but software seldom does the proper thing on its own. Because of this, a few companies have come out with special drive models for audio/video use which employ special buffering techniques right on the drive. These drives, of course, cost significantly more than their counterparts. Some other drives offer a way to trigger thermal recalibration prematurely (thus resetting the timer), so if your real-time operation is shorter than the recalibration interval, you can use this to assure your operation goes uninterrupted. Disabling or delaying recalibration is dangerous and should be completely avoided. For more information on the thermal recalibration characteristics of a drive, contact the drive manufacturer directly. Q) 3.15 Can I mount my hard drive sideways/upside down? Old hard drives always had specific requirements for mounting while most modern hard drives can be mounted in any orientation. Some modern hard drives still have mounting restrictions; the only way to be sure is to read the documentation that comes with the drive or contact the manufacturer directly and ask. Restrictions may be model specific so be sure you know the exact model number of your drive. A common