Lakshminarayanan Renganarayanan, DaeGon Kim, Sanjay Rajopadhye, and Michelle Strout. Parameterized Tiled Loops for Free. In PLDI : ACM SIGPLAN Conference on Programming Language Design and Implementation, June 2007 [PDF]
What is Parameterized Tiled Loop Generation? (in 2 mins. or
less)
Tiling is a widely used
loop transformation
for exposing coarse grained parallelism or to improve data locality. Use of
tiling involves deriving the tiled loop program from the original loop program.
Deriving the tiled code is a complex task. There are several tools such as
Cloog and
Omega which can generate
tiled loops when the tile sizes are fixed. However, not fixing the tile sizes,
but leaving them as symbolic parameters can enable several
install/link/run-time optimizations. TLOG provides an
efficient way to generate such parameterized tiled loops.
Where to get it?
You can download the tar gzipped bundle here.
The README file in the distribution has information about how to compile
and execute TLOG. There are four examples in the Examples directory that
show how to write input files for TLOG and how to use them to generate
parameterized tiled loops. For now, the only other source of information
about TLOG is our PLDI 2007 paper (cited above). If you need any further
infomation please feel free to drop an email to
ln AT CS DOT COLOSTATE DOT EDU or
kim AT CS DOT COLOSTATE DOT EDU