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melange:papers:fall2019 [2019/10/09 12:07]
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melange:papers:fall2019 [2019/12/02 11:09] (current)
jana |
| | @article{Vasilache:2019:NAL:3366460.3355606, |
| | author = {Vasilache, Nicolas and Zinenko, Oleksandr and Theodoridis, Theodoros and Goyal, Priya and Devito, Zachary and Moses, William S. and Verdoolaege, Sven and Adams, Andrew and Cohen, Albert}, |
| | title = {The Next 700 Accelerated Layers: From Mathematical Expressions of Network Computation Graphs to Accelerated GPU Kernels, Automatically}, |
| | journal = {ACM Trans. Archit. Code Optim.}, |
| | issue_date = {November 2019}, |
| | volume = {16}, |
| | number = {4}, |
| | month = oct, |
| | year = {2019}, |
| | issn = {1544-3566}, |
| | pages = {38:1--38:26}, |
| | articleno = {38}, |
| | numpages = {26}, |
| | url = {http://doi.acm.org/10.1145/3355606}, |
| | doi = {10.1145/3355606}, |
| | acmid = {3355606}, |
| | publisher = {ACM}, |
| | address = {New York, NY, USA}, |
| | keywords = {Deep learning layers, GPU acceleration, polyhedral compilation}, |
| | } |
| | @inproceedings{Augustine:2019:GPC:3314221.3314615, |
| | author = {Augustine, Travis and Sarma, Janarthanan and Pouchet, Louis-Noël and Rodríguez, Gabriel}, |
| | title = {Generating Piecewise-regular Code from Irregular Structures}, |
| | booktitle = {Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation}, |
| | series = {PLDI 2019}, |
| | year = {2019}, |
| | isbn = {978-1-4503-6712-7}, |
| | location = {Phoenix, AZ, USA}, |
| | pages = {625--639}, |
| | numpages = {15}, |
| | url = {http://doi.acm.org/10.1145/3314221.3314615}, |
| | doi = {10.1145/3314221.3314615}, |
| | acmid = {3314615}, |
| | publisher = {ACM}, |
| | address = {New York, NY, USA}, |
| | keywords = {Polyhedral compilation, SpMV, sparse data structure, trace compression}, |
| | } |
| @inproceedings{Rawat:2016:ERM:2884045.2884047, | @inproceedings{Rawat:2016:ERM:2884045.2884047, |
| author = {Rawat, Prashant Singh and Hong, Changwan and Ravishankar, Mahesh and Grover, Vinod and Pouchet, Louis-Noël and Sadayappan, P.}, | author = {Rawat, Prashant Singh and Hong, Changwan and Ravishankar, Mahesh and Grover, Vinod and Pouchet, Louis-Noël and Sadayappan, P.}, |
| |
| |
| @ARTICLE{2018arXiv180502566K, | |
| author = {{Kwon}, Hyoukjun and {Chatarasi}, Prasanth and {Pellauer}, Michael and | |
| {Parashar}, Angshuman and {Sarkar}, Vivek and {Krishna}, Tushar}, | @article{DBLP:journals/corr/abs-1805-02566, |
| title = "{Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach}", | author = {Hyoukjun Kwon and |
| journal = {arXiv e-prints}, | Michael Pellauer and |
| keywords = {Computer Science - Distributed, Parallel, and Cluster Computing, Computer Science - Machine Learning}, | Tushar Krishna}, |
| year = "2018", | title = {Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach}, |
| month = "May", | journal = {CoRR}, |
| eid = {arXiv:1805.02566}, | volume = {abs/1805.02566}, |
| pages = {arXiv:1805.02566}, | year = {2018}, |
| archivePrefix = {arXiv}, | url = {http://arxiv.org/abs/1805.02566}, |
| eprint = {1805.02566}, | archivePrefix = {arXiv}, |
| primaryClass = {cs.DC}, | eprint = {1805.02566}, |
| adsurl = {https://ui.adsabs.harvard.edu/abs/2018arXiv180502566K}, | timestamp = {Mon, 13 Aug 2018 16:46:45 +0200}, |
| adsnote = {Provided by the SAO/NASA Astrophysics Data System} | biburl = {https://dblp.org/rec/bib/journals/corr/abs-1805-02566}, |
| | bibsource = {dblp computer science bibliography, https://dblp.org} |
| | } |
| |
| |
| address = {New York, NY, USA}, | address = {New York, NY, USA}, |
| } | } |
| | |
| | @ARTICLE{7738524, author={Y. H. Chen and T. Krishna and J. S. Emer and V. Sze}, journal={IEEE Journal of Solid-State Circuits}, title={Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks}, year={2017}, volume={52}, number={1}, pages={127-138}, url = {http://ieeexplore.ieee.org/document/7738524/}, doi={10.1109/JSSC.2016.2616357}, ISSN={0018-9200}, month={Jan},} |
| | |
| | @article{Vasilache:2019:NAL:3366460.3355606, |
| | author = {Vasilache, Nicolas and Zinenko, Oleksandr and Theodoridis, Theodoros and Goyal, Priya and Devito, Zachary and Moses, William S. and Verdoolaege, Sven and Adams, Andrew and Cohen, Albert}, |
| | title = {The Next 700 Accelerated Layers: From Mathematical Expressions of Network Computation Graphs to Accelerated GPU Kernels, Automatically}, |
| | journal = {ACM Trans. Archit. Code Optim.}, |
| | issue_date = {October 2019}, |
| | volume = {16}, |
| | number = {4}, |
| | month = oct, |
| | year = {2019}, |
| | issn = {1544-3566}, |
| | pages = {38:1--38:26}, |
| | articleno = {38}, |
| | numpages = {26}, |
| | url = {http://doi.acm.org/10.1145/3355606}, |
| | doi = {10.1145/3355606}, |
| | acmid = {3355606}, |
| | publisher = {ACM}, |
| | address = {New York, NY, USA}, |
| | keywords = {Deep learning layers, GPU acceleration, polyhedral compilation}, |
| | |
