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melange:papers:spring2018 [2018/02/21 17:12] sanjay |
melange:papers:spring2018 [2018/04/10 17:33] prerana |
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- | BibTeX | EndNote | ACM Ref | ||
@article{Feautrier: | @article{Feautrier: | ||
| | ||
Line 167: | Line 166: | ||
pages = {488--503}, | pages = {488--503}, | ||
| | ||
- | url = {http://dl.acm.org/ | + | url = {https://www.cs.colostate.edu/ |
acmid = {706926}, | acmid = {706926}, | ||
| | ||
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@Article{feautrier91, | @Article{feautrier91, | ||
- | author= | + | author= " |
title= | title= | ||
journal= | journal= | ||
Line 199: | Line 198: | ||
month= | month= | ||
url= " | url= " | ||
- | annote= | ||
- | program (consisting only of assignments, | ||
- | limits, and arrays with affine index expressions), | ||
- | analyzed to find the flow dependencies." | ||
} | } | ||
@article{feautrier92a, | @article{feautrier92a, | ||
- | | + | author |
- | title = {Some Efficient Solutions to the Affine Scheduling Problem. | + | title = {Some Efficient Solutions to the Affine Scheduling Problem {Part I}. One-dimensional Time}, |
- | | + | journal |
- | journal | + | volume |
- | volume | + | number |
- | number | + | year = {1992}, |
- | year = {1992}, | + | pages = {313-347}, |
- | pages = {313-347}, | + | url = {http:// |
- | url = {http:// | + | |
} | } | ||
@article{feautrier92b, | @article{feautrier92b, | ||
- | | + | author |
- | title = {Some Efficient Solutions to the Affine Scheduling Problem. | + | title = {Some Efficient Solutions to the Affine Scheduling Problem {Part II}. Multidimensional Time}, |
- | {Part II}. Multidimensional Time}, | + | journal |
- | journal | + | volume |
- | volume | + | number |
- | number | + | year = {1992}, |
- | year = {1992}, | + | pages = {389-420}, |
- | pages = {389-420}, | + | url = {http:// |
- | url = {http:// | + | |
} | } | ||
@Article{collard-etal-fuzzy-jpdc-1997, | @Article{collard-etal-fuzzy-jpdc-1997, | ||
- | | + | author = |
- | title = {Fuzzy Array Data Flow Analysis}, | + | title = {Fuzzy Array Data Flow Analysis}, |
- | journal = {Journal of Parallel and Distributed Computing}, | + | journal = {Journal of Parallel and Distributed Computing}, |
- | year = | + | year = |
- | volume = 40, | + | volume = 40, |
- | number = 2, | + | number = 2, |
- | pages = {210-226}, | + | pages = {210-226}, |
- | url = {http://doi.acm.org/10.1145/209937.209947}, | + | url = {https://www.sciencedirect.com/science/article/ |
- | month = {Feb}} | + | month = {Feb}} |
@InProceedings{BPCB10, | @InProceedings{BPCB10, | ||
- | | + | author = {Benabderrahmane, |
- | | + | title = {The Polyhedral Model Is More Widely Applicable Than You Think}, |
- | title = {The Polyhedral Model Is More Widely Applicable Than You | + | booktitle = |
- | | + | year = 2010, |
- | booktitle = | + | series = {LNCS}, |
- | | + | address = |
- | year = 2010, | + | pages = |
- | series = {LNCS}, | + | url = |
- | address = | + | month = |
- | pages = | + | publisher = |
- | url = | + | |
- | month = | + | |
- | publisher = | + | |
Line 279: | Line 269: | ||
@inproceedings{Bandishti: | @inproceedings{Bandishti: | ||
- | author = {Bandishti, Vinayaka and Pananilath, Irshad and Bondhugula, Uday}, | + | author = {Bandishti, Vinayaka and Pananilath, Irshad and Bondhugula, Uday}, |
- | title = {Tiling Stencil Computations to Maximize Parallelism}, | + | title = {Tiling Stencil Computations to Maximize Parallelism}, |
- | | + | booktitle = {Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis}, |
- | | + | series = {SC ' |
- | year = {2012}, | + | year = {2012}, |
- | isbn = {978-1-4673-0804-5}, | + | isbn = {978-1-4673-0804-5}, |
- | | + | location = {Salt Lake City, Utah}, |
- | pages = {40: | + | pages = {40: |
- | | + | articleno = {40}, |
- | | + | numpages = {11}, |
- | url = {http:// | + | url = {http:// |
- | acmid = {2389051}, | + | acmid = {2389051}, |
- | | + | publisher = {IEEE Computer Society Press}, |
- | | + | address = {Los Alamitos, CA, USA}, |
- | | + | keywords = {compilers, program transformation}, |
} | } | ||
Line 337: | Line 327: | ||
@article{DBLPSteve, | @article{DBLPSteve, | ||
- | | + | author |
- | Cliff Woolley and | + | title = {cuDNN: Efficient Primitives for Deep Learning}, |
- | Philippe Vandermersch and | + | journal |
- | Jonathan Cohen and | + | volume |
- | John Tran and | + | year = {2014}, |
- | Bryan Catanzaro and | + | url = {http:// |
- | Evan Shelhamer}, | + | timestamp = {Sun, 02 Nov 2014 11:25:59 +0100}, |
- | title = {cuDNN: Efficient Primitives for Deep Learning}, | + | biburl |
- | journal | + | bibsource = {dblp computer science bibliography, |
- | volume | + | |
- | year = {2014}, | + | |
- | url = {http:// | + | |
- | timestamp = {Sun, 02 Nov 2014 11:25:59 +0100}, | + | |
- | biburl | + | |
- | bibsource = {dblp computer science bibliography, | + | |
} | } | ||
@article{Bao: | @article{Bao: | ||
- | author = {Bao, Wenlei and Hong, Changwan and Chunduri, Sudheer and Krishnamoorthy, | + | author = {Bao, Wenlei and Hong, Changwan and Chunduri, Sudheer and Krishnamoorthy, |
- | title = {Static and Dynamic Frequency Scaling on Multicore CPUs}, | + | title = {Static and Dynamic Frequency Scaling on Multicore CPUs}, |
- | | + | journal = {ACM Trans. Archit. Code Optim.}, |
- | | + | issue_date = {December 2016}, |
- | | + | volume = {13}, |
- | | + | number = {4}, |
- | month = dec, | + | month = dec, |
- | year = {2016}, | + | year = {2016}, |
- | issn = {1544-3566}, | + | issn = {1544-3566}, |
- | pages = {51: | + | pages = {51: |
- | | + | articleno = {51}, |
- | | + | numpages = {26}, |
- | url = {http:// | + | url = {http:// |
- | doi = {10.1145/ | + | doi = {10.1145/ |
- | acmid = {3011017}, | + | acmid = {3011017}, |
- | | + | publisher = {ACM}, |
- | | + | address = {New York, NY, USA}, |
- | | + | keywords = {Affine Programs, CPU Energy, Static Analysis, Voltage and Frequency Scaling}, |
} | } | ||
@inproceedings{Pouchet: | @inproceedings{Pouchet: | ||
- | author = {Pouchet, Louis-Noel and Zhang, Peng and Sadayappan, P. and Cong, Jason}, | + | author = {Pouchet, Louis-Noel and Zhang, Peng and Sadayappan, P. and Cong, Jason}, |
- | title = {Polyhedral-based Data Reuse Optimization for Configurable Computing}, | + | title = {Polyhedral-based Data Reuse Optimization for Configurable Computing}, |
- | | + | booktitle = {Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays}, |
- | | + | series = {FPGA ' |
- | year = {2013}, | + | year = {2013}, |
- | isbn = {978-1-4503-1887-7}, | + | isbn = {978-1-4503-1887-7}, |
- | | + | location = {Monterey, California, USA}, |
- | pages = {29--38}, | + | pages = {29--38}, |
- | | + | numpages = {10}, |
- | url = {http:// | + | url = {http:// |
- | doi = {10.1145/ | + | doi = {10.1145/ |
- | acmid = {2435273}, | + | acmid = {2435273}, |
- | | + | publisher = {ACM}, |
- | | + | address = {New York, NY, USA}, |
- | | + | keywords = {compilation, |
} | } | ||
@article{Kong: | @article{Kong: | ||
- | author = {Kong, Martin and Veras, Richard and Stock, Kevin and Franchetti, Franz and Pouchet, Louis-No\" | + | author = {Kong, Martin and Veras, Richard and Stock, Kevin and Franchetti, Franz and Pouchet, Louis-No\" |
- | title = {When Polyhedral Transformations Meet SIMD Code Generation}, | + | title = {When Polyhedral Transformations Meet SIMD Code Generation}, |
- | | + | journal = {SIGPLAN Not.}, |
- | | + | issue_date = {June 2013}, |
- | | + | volume = {48}, |
- | | + | number = {6}, |
- | month = jun, | + | month = jun, |
- | year = {2013}, | + | year = {2013}, |
- | issn = {0362-1340}, | + | issn = {0362-1340}, |
- | pages = {127--138}, | + | pages = {127--138}, |
- | | + | numpages = {12}, |
- | url = {http:// | + | url = {http:// |
- | doi = {10.1145/ | + | doi = {10.1145/ |
- | acmid = {2462187}, | + | acmid = {2462187}, |
- | | + | publisher = {ACM}, |
- | | + | address = {New York, NY, USA}, |
- | | + | keywords = {affine scheduling, autotuning, compiler optimization, |
} | } | ||
@article{cummins2017synthesizing, | @article{cummins2017synthesizing, | ||
- | title={Synthesizing benchmarks for predictive modeling}, | + | title={Synthesizing benchmarks for predictive modeling}, |
- | | + | author={Cummins, |
- | | + | year={2017}, |
- | | + | url={http:// |
} | } | ||
@article{optimistic2017, | @article{optimistic2017, | ||
- | title={Optimistic Loop Optimization}, | + | title={Optimistic Loop Optimization}, |
- | | + | author={Doerfert, |
- | | + | url = {http:// |
- | | + | year={2017} |
} | } | ||
@inproceedings{Ogilvie: | @inproceedings{Ogilvie: | ||
- | author = {Ogilvie, William F. and Petoumenos, Pavlos and Wang, Zheng and Leather, Hugh}, | + | author = {Ogilvie, William F. and Petoumenos, Pavlos and Wang, Zheng and Leather, Hugh}, |
- | title = {Minimizing the Cost of Iterative Compilation with Active Learning}, | + | title = {Minimizing the Cost of Iterative Compilation with Active Learning}, |
- | | + | booktitle = {Proceedings of the 2017 International Symposium on Code Generation and Optimization}, |
- | | + | series = {CGO ' |
- | year = {2017}, | + | year = {2017}, |
- | isbn = {978-1-5090-4931-8}, | + | isbn = {978-1-5090-4931-8}, |
- | | + | location = {Austin, USA}, |
- | pages = {245--256}, | + | pages = {245--256}, |
- | | + | numpages = {12}, |
- | url = {http:// | + | url = {http:// |
- | acmid = {3049859}, | + | acmid = {3049859}, |
- | | + | publisher = {IEEE Press}, |
- | | + | address = {Piscataway, |
- | | + | keywords = {Active Learning, Compilers, Iterative Compilation, |
} | } | ||
Line 447: | Line 431: | ||
@inproceedings{Putnam: | @inproceedings{Putnam: | ||
- | author = {Putnam, Andrew and Caulfield, Adrian M. and Chung, Eric S. and Chiou, Derek and Constantinides, | + | author = {Putnam, Andrew and Caulfield, Adrian M. and Chung, Eric S. and Chiou, Derek and Constantinides, |
- | title = {A Reconfigurable Fabric for Accelerating Large-scale Datacenter Services}, | + | title = {A Reconfigurable Fabric for Accelerating Large-scale Datacenter Services}, |
- | | + | booktitle = {Proceeding of the 41st Annual International Symposium on Computer Architecuture}, |
- | | + | series = {ISCA ' |
- | year = {2014}, | + | year = {2014}, |
- | isbn = {978-1-4799-4394-4}, | + | isbn = {978-1-4799-4394-4}, |
- | | + | location = {Minneapolis, |
- | pages = {13--24}, | + | pages = {13--24}, |
- | | + | numpages = {12}, |
- | url = {http:// | + | url = {http:// |
- | acmid = {2665678}, | + | acmid = {2665678}, |
- | | + | publisher = {IEEE Press}, |
- | | + | address = {Piscataway, |
} | } | ||
- | [download] | ||
@miscellaneous{accelerating-deep-convolutional-neural-networks-using-specialized-hardware, | @miscellaneous{accelerating-deep-convolutional-neural-networks-using-specialized-hardware, | ||
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@inproceedings{Deitz: | @inproceedings{Deitz: | ||
- | author = {Deitz, Steven J. and Chamberlain, | + | author = {Deitz, Steven J. and Chamberlain, |
- | title = {Eliminating Redundancies in Sum-of-product Array Computations}, | + | title = {Eliminating Redundancies in Sum-of-product Array Computations}, |
- | | + | booktitle = {Proceedings of the 15th International Conference on Supercomputing}, |
- | | + | series = {ICS ' |
- | year = {2001}, | + | year = {2001}, |
- | isbn = {1-58113-410-X}, | + | isbn = {1-58113-410-X}, |
- | | + | location = {Sorrento, Italy}, |
- | pages = {65--77}, | + | pages = {65--77}, |
- | | + | numpages = {13}, |
- | url = {http:// | + | url = {http:// |
- | doi = {10.1145/ | + | doi = {10.1145/ |
- | acmid = {377807}, | + | acmid = {377807}, |
- | | + | publisher = {ACM}, |
- | | + | address = {New York, NY, USA}, |
} | } | ||
@inproceedings{Basu: | @inproceedings{Basu: | ||
- | author = {Basu, Protonu and Hall, Mary and Williams, Samuel and Straalen, Brian Van and Oliker, Leonid and Colella, Phillip}, | + | author = {Basu, Protonu and Hall, Mary and Williams, Samuel and Straalen, Brian Van and Oliker, Leonid and Colella, Phillip}, |
- | title = {Compiler-Directed Transformation for Higher-Order Stencils}, | + | title = {Compiler-Directed Transformation for Higher-Order Stencils}, |
- | | + | booktitle = {Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium}, |
- | | + | series = {IPDPS ' |
- | year = {2015}, | + | year = {2015}, |
- | isbn = {978-1-4799-8649-1}, | + | isbn = {978-1-4799-8649-1}, |
- | pages = {313--323}, | + | pages = {313--323}, |
- | | + | numpages = {11}, |
- | url = {http:// | + | url = {http:// |
- | doi = {10.1109/ | + | doi = {10.1109/ |
- | acmid = {2863932}, | + | acmid = {2863932}, |
- | | + | publisher = {IEEE Computer Society}, |
- | | + | address = {Washington, |
- | | + | keywords = {Compiler Optimization, |
} | } | ||
@inproceedings{Putnam: | @inproceedings{Putnam: | ||
- | author = {Putnam, Andrew R. and Bennett, Dave and Dellinger, Eric and Mason, Jeff and Sundararajan, | + | author = {Putnam, Andrew R. and Bennett, Dave and Dellinger, Eric and Mason, Jeff and Sundararajan, |
- | title = {CHiMPS: A High-level Compilation Flow for Hybrid CPU-FPGA Architectures}, | + | title = {CHiMPS: A High-level Compilation Flow for Hybrid CPU-FPGA Architectures}, |
- | | + | booktitle = {Proceedings of the 16th International ACM/SIGDA Symposium on Field Programmable Gate Arrays}, |
- | | + | series = {FPGA ' |
- | year = {2008}, | + | year = {2008}, |
- | isbn = {978-1-59593-934-0}, | + | isbn = {978-1-59593-934-0}, |
- | | + | location = {Monterey, California, USA}, |
- | pages = {261--261}, | + | pages = {261--261}, |
- | | + | numpages = {1}, |
- | url = {http:// | + | url = {http:// |
- | doi = {10.1145/ | + | doi = {10.1145/ |
- | acmid = {1344720}, | + | acmid = {1344720}, |
- | | + | publisher = {ACM}, |
- | | + | address = {New York, NY, USA}, |
- | | + | keywords = {FPGA, FPGA accelerators, |
} | } | ||
@inproceedings{Wong: | @inproceedings{Wong: | ||
- | author = {Wong, Henry and Betz, Vaughn and Rose, Jonathan}, | + | author = {Wong, Henry and Betz, Vaughn and Rose, Jonathan}, |
- | title = {Comparing FPGA vs. Custom Cmos and the Impact on Processor Microarchitecture}, | + | title = {Comparing FPGA vs. Custom Cmos and the Impact on Processor Microarchitecture}, |
- | | + | booktitle = {Proceedings of the 19th ACM/SIGDA International Symposium on Field Programmable Gate Arrays}, |
- | | + | series = {FPGA ' |
- | year = {2011}, | + | year = {2011}, |
- | isbn = {978-1-4503-0554-9}, | + | isbn = {978-1-4503-0554-9}, |
- | | + | location = {Monterey, CA, USA}, |
- | pages = {5--14}, | + | pages = {5--14}, |
- | | + | numpages = {10}, |
- | url = {http:// | + | url = {http:// |
- | doi = {10.1145/ | + | doi = {10.1145/ |
- | acmid = {1950419}, | + | acmid = {1950419}, |
- | | + | publisher = {ACM}, |
- | | + | address = {New York, NY, USA}, |
- | | + | keywords = {area, cmos, delay, fpga, soft processor}, |
} | } | ||
@article{DBLP: | @article{DBLP: | ||
- | | + | author |
- | R{\' | + | title = {Memory-Efficient Backpropagation Through Time}, |
- | Ivo Danihelka and | + | journal |
- | Marc Lanctot and | + | volume |
- | Alex Graves}, | + | year = {2016}, |
- | title = {Memory-Efficient Backpropagation Through Time}, | + | url = {http:// |
- | journal | + | timestamp = {Fri, 01 Jul 2016 17:39:49 +0200}, |
- | volume | + | biburl |
- | year = {2016}, | + | bibsource = {dblp computer science bibliography, |
- | url = {http:// | + | |
- | timestamp = {Fri, 01 Jul 2016 17:39:49 +0200}, | + | |
- | biburl | + | |
- | bibsource = {dblp computer science bibliography, | + | |
} | } | ||
@inproceedings{FlowMap1994, | @inproceedings{FlowMap1994, | ||
- | author = {J. Cong and Ding, Yuzheng}, | + | author = {J. Cong and Ding, Yuzheng}, |
- | title = {FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs}, | + | title = {FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs}, |
- | | + | booktitle = { IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, |
- | year = {1994}, | + | year = {1994}, |
- | isbn = {1937-4151}, | + | isbn = {1937-4151}, |
- | pages = {1-12}, | + | pages = {1-12}, |
- | url = {http:// | + | url = {http:// |
- | doi = {10.1109/ | + | doi = {10.1109/ |
- | | + | publisher = { IEEE} |
} | } | ||