State University Computer Science Department

CS/EE 560: Reconfigurable Computing, Spring 2008

Class meets: Tu-Th 15:30-16:45; USC 310B


Be sure to watch this space. Late breaking info will be posted here, rather than sent by email. Also be sure to frequently check the Class Schedule

Course Overview

This course is the graduate level complement to (Embedded Systems) in a new curriculum in High Level Programming for High Performance Embedded Computing Systems, sponsored by NSF and CSU. The original focus of CS560 was on fine grain parallel architectures and the use of high level models, languages tools and abstractions, using CS/ECE 460 as a prerequisite. This focus has been enlarged as described below, to allow CS475 as an alternative prerequisite.

In this class you will learn the foundations of fine grain parallelism covering (i) the polyhedral model and (ii) stream based and data parallel models. Fine grain parallelism may be studied from an architectural view or as an abstraction for general purpose parallel programming. The first view is appropriate for students with prior experience with FPGAs (i.e., with the CS 460 prerequisite). The second view is relevant to students with a general purpose parallel programming training (e.g., the CS475 prerequisite).

Project: You will transform your understanding of the foundations by demonstrating in your term project, highly tuned parallel implementations of the compute intensive kernels of selected applications on a specific platform of your choice. Depending on your background and aptitude, you may implement your designs on either (i) special purpose hardware on FPGA based platforms; or (ii) parallel programs for the IBM Cell. Specifically, the following platforms will be available.

Here are some more details about the project including a tentative schedule.

Class Topics: The first part of the course will cover a class of highly parallel architectures called systolic arrays that are used for the compute/data intensive parts of many applications. Next, we will see how to systematically design such architectures from high level equational specifications (programs) using the polyhedral model. We will then study tiling and its relationship to systolic architectures as well as to general purpose parallel programming.

The second part will cover stream based and data parallel programming models, and their compilation to hardware. Specifically, we will study an important model of streams called Kahn process networks, its relation to the SAC language developed at CSU, and the automatic compilation of SAC programs to reconfigurable coprocessors.