Journal Publications

• Bassem Ghorbel and Vinayak S. Prabhu, Quantitative Robustness for Signal Temporal Logic With Time-Freeze Quantifiers.  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume: 42, Issue: 12, IEEE 2023, pp. 4436 - 4449.
• Samira S. Farahani, Rupak Majumdar, Vinayak S. Prabhu and Sadegh Soudjani, Shrinking horizon Model Predictive Control with Signal Temporal Logic constraints under stochastic disturbances .   IEEE Transactions on Automatic Control,   Volume: 64 , Issue: 8, IEEE 2019, pp. 3324-3331.
• Jyotirmoy V. Deshmukh, Marko Horvat, Xiaoqing Jin, Rupak Majumdar and Vinayak S. Prabhu, Testing Cyber-Physical Systems through Bayesian Optimization . Transactions on Embedded Computing Systems (TECS), ESWEEK special issue for articles presented in the 2017 ACM SIGBED International Conference on Embedded Software (EMSOFT), vol 16(5s) ACM 2017, pp. 170:1-170:18.
• Jyotirmoy V. Deshmukh, Rupak Majumdar and Vinayak S. Prabhu, Quantifying conformance using the Skorokhod metric.   Formal Methods in System Design.   Vol 50 (2-3), Springer 2017, pp. 168--206.
• Krishnendu Chatterjee, and Vinayak S. Prabhu, Quantitative temporal simulation and refinement distances for timed systems.  Transactions on Automatic Control, IEEE, 60(9), 2015, pp. 2291-2306.
• Krishnendu Chatterjee, and Vinayak S. Prabhu, Synthesis of memory-efficient, clock-memory free, and non-Zeno safety controllers for timed systems.  Information and Computation, Elsevier, 228 (2013), pp. 83-119.
• Krishnendu Chatterjee, Thomas A. Henzinger, and Vinayak S. Prabhu, Timed parity games: Complexity and robustness.  Journal of Logical Methods in Computer Science, 7(4) (2011), pp. 1-55.