Over the last several years, FPGAs and other adaptive computers have evolved from simple "glue logic" chips into powerful coprocessors. For example, a Xilinx Virtex I 2000 series FPGA (circa 1st Quarter, 2001) contains 38,400 loook up tables, each capable of computing two arbitrary 4-to-1 bit functions and associated with 1 bit of memory. Furthermore, because the logic blocks are connected via a reconfigurable mesh of wires, they can be configured into massively parallel circuits that directly implement algorithms. As a result, they can achieve very high computational densities. In fact, for many applications FPGAs have grown more powerful then the general-purpose processors they were meant to serve, if only we can unleash their potential.
In the past, FPGAs have been programmed in hardware discription languages, such as Verilog or VHDL. This puts them off limits to applications programmers who have been trained in traditional algorithmic programming languages such as C, C++, Java or Fortran. Worse still, even skilled circuit designers find it difficult to embed complex algorithms directly in VHDL or Verilog circuits, or to modify existing circuits to accommodate algorithmic changes. This increases the design time and ultimately the cost of any application exploiting FPGAs.
The goal of the Cameron project is to remove the circuit design barrier and make FPGAs accessible to a wider audience. In particular, we want to raise the level of abstraction for FPGAs from a circuit based design model to an algorithmic programming one. To this end, we have designed a high-level language that can be automatically compiled to circuits, and we have implemented an optimizing compiler that produces FPGA configurations directly from high-level source code. As a result, we have created a one-step process for compiling applications directly to FPGAs, in much the same way as a traditional compiler maps high-level source code to a series of machine instructions.
The high-level algorithmic language we developed is a variant of the well-known C programming language. It is called "Single Assignment C", or SA-C (pronounced "sassy") for short. In designing SA-C, we tried to stay as close to C as possible, in order to make the language easy to learn and use. However, the C language is intimately tied to the traditional von Neumann model of processors and memories, where every variable corresponds to a memory location and functions reside on a calling stack. As a result, it is easy to write programs in C that cannot easily be mapped onto circuits or FPGAs, for example by directly manipulating addresses. While other researchers try to map C programs onto circuits with only limited success, we simplified the problem by designing a more appropriate language. As a result, we have a working system with an optimizing compiler today.
SA-C and the SA-C compiler allow programmers to develop software in a traditional Unix programming environment. Some applications programmers, however, prefer other software development tools. In particular, the image processing community has embraced the Khoros software development environment. For that reason, our partners at Khoral Research, Inc. have developed a toolbox that supports developing, editing and compiling SA-C modules inside the Cantata environment, and allows independently compiled SA-C modules to be grouped ("lassoed") and recompiled as a single optimized function.
SA-C and the SA-C optimizing compiler allow us to quickly map application programs onto FPGAs. Our primary focus has been image processing applications, and our first test was to implement the Image Processing portion of the Vector, Signal and Image Processing Library (VSIPL). More recently, we have implemented portions of the Intel@ Image Processing Library (IPL), as well as the ARAGTAP pre-screener, an automatic target recognition (ATR) program developed by the U.S. Air Force. We have also studied the Discrete Cosine Transform (DCT) in SA-C, experimenting to find out how many bits of fixed-point precision it requires. Most recently, we have started to look at ATR probing algorithms.